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    Ferroelectric flat panel displays
    1.
    发明授权
    Ferroelectric flat panel displays 失效
    铁电平板显示屏

    公开(公告)号：US06198225B1

    公开(公告)日：2001-03-06

    申请号：US09326838

    申请日：1999-06-07

    申请人： Gota Kano ,  Yasuhiro Shimada ,  Shinichiro Hayashi ,  Koji Arita ,  Carlos A. Paz de Araujo ,  Joseph D. Cuchiaro ,  Larry D. McMillan

    发明人： Gota Kano ,  Yasuhiro Shimada ,  Shinichiro Hayashi ,  Koji Arita ,  Carlos A. Paz de Araujo ,  Joseph D. Cuchiaro ,  Larry D. McMillan

    IPC分类号： G09G310

    CPC分类号： G09G3/367 ,  G09G3/22 ,  H01J1/30 ,  H01J2201/306 ,  H01J2329/00

    摘要： A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using an inventive liquid precursor containing an alkoxycarboxylate. The thin film thickness is preferably in the range 50-140 nm, so that polarizabilty and transparency of the thin film is enhanced. A display element may comprise a varistor device to prevent cross-talk between pixels and to enable sudden polarization switching. A functional gradient in the ferroelectric thin film enhances electron emission. Two ferroelectric elements, one on either side of the phosphor may be used to enhance luminescence. A phosphor can be sandwiched between a dielectric and a ferroelectric to enhance emission.

    摘要翻译： 平板显示装置中的铁电层状超晶格材料薄膜被通电以选择性地影响显示图像。 在一个实施例中，电压脉冲使得层状超晶格材料发射撞击磷光体的电子，导致磷光体发光。 在另一个实施例中，电位在层状超晶格材料中产生剩余极化，其在液晶层中施加电场，从而影响透过液晶的透射率。 层状超晶格材料是使用本发明的含有烷氧基羧酸盐的液体前体形成的金属氧化物。 薄膜厚度优选在50-140nm的范围内，从而提高薄膜的极化性和透明度。 显示元件可以包括用于防止像素之间的串扰并允许突发极化切换的变阻器装置。 铁电薄膜中的功能梯度增强了电子发射。 可以使用两个铁电元件，一个在荧光体的两侧，以增强发光。 荧光体可以夹在电介质和铁电体之间以增强发射。

    Ferroelectric memory and method of operating same
    2.
    发明授权
    Ferroelectric memory and method of operating same 有权
    铁电存储器和操作方法相同

    公开(公告)号：US06924997B2

    公开(公告)日：2005-08-02

    申请号：US10381235

    申请日：2001-09-25

    申请人： Zheng Chen ,  Vikram Joshi ,  Myoungho Lim ,  Carlos A. Paz de Araujo ,  Larry D. McMillan ,  Yoshihisa Kato ,  Tatsuo Otsuki ,  Yasuhiro Shimada

    发明人： Zheng Chen ,  Vikram Joshi ,  Myoungho Lim ,  Carlos A. Paz de Araujo ,  Larry D. McMillan ,  Yoshihisa Kato ,  Tatsuo Otsuki ,  Yasuhiro Shimada

    IPC分类号： G11C11/22

    CPC分类号： G11C11/22

    摘要： A ferroelectric memory 636 includes a group of memory cells (645, 12, 201, 301, 401, 501), each cell having a ferroelectric memory element (44, 218, etc.), a drive line (122, 322, 422, 522 etc.) on which a voltage for writing information to the group of memory cells is placed, a bit line (25, 49, 125, 325, 425, 525, etc.) on which information to be read out of the group of memory cells is placed, a preamplifier (20, 42, 120, 320, 420, etc.) between the memory cells and the bit line, a set switch (14, 114, 314, 414, 514, etc.) connected between the drive line and the memory cells, and a reset switch (16, 116, 316, 416, 516, etc.) connected to the memory cells in parallel with the preamplifier. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.

    摘要翻译： 铁电存储器636包括一组存储单元（645,12,21,301,401,501），每个单元具有铁电存储元件（44,218等），驱动线（122,322,422， 522等），在其上放置用于将信息写入到存储器单元组的电压，位线（25,49,125,325,425,525等），其中要从该组存储器单元读出的信息 放置存储器单元，在存储器单元和位线之间的前置放大器（20,42,120,320,420等），连接在存储器单元之间的设定开关（14,114,314,414,514等） 驱动线和存储器单元，以及与前置放大器并联连接到存储器单元的复位开关（16,116,316,416,516等）。 通过将小于铁电存储元件的矫顽电压的电压放置在存储元件上来读取存储器。 在读取之前，通过使铁电存储元件的两个电极接地来放电来自该组电池的噪声。

    Method of manufacturing a semiconductor device
    8.
    发明授权
    Method of manufacturing a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US5837591A

    公开(公告)日：1998-11-17

    申请号：US803144

    申请日：1997-02-19

    申请人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

    发明人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

    IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/822 ,  H01L27/04 ,  H01L27/10 ,  H01L27/115 ,  H01L21/20

    CPC分类号： H01L27/11502 ,  H01L28/40

    摘要： A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.

    摘要翻译： 半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有独立地引导到下电极7和上电极9的接触孔13的第二绝缘膜11，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和形成在扩散阻挡层上的互连层15 在接触孔13的底部的扩散阻挡层17中，形成由粒状晶体构成的层状区域。

    Semiconductor memory and method of driving semiconductor memory
    10.
    发明授权
    Semiconductor memory and method of driving semiconductor memory 失效
    半导体存储器和驱动半导体存储器的方法

    公开(公告)号：US06396095B1

    公开(公告)日：2002-05-28

    申请号：US09869522

    申请日：2001-06-29

    申请人： Yasuhiro Shimada ,  Koji Arita ,  Kiyoshi Uchiyama

    发明人： Yasuhiro Shimada ,  Koji Arita ,  Kiyoshi Uchiyama

    IPC分类号： H01L2976

    CPC分类号： G11C11/22 ,  H01L21/28291 ,  H01L29/42324 ,  H01L29/516 ,  H01L29/78391

    摘要： Source/drain regions for a field effect transistor are defined in a semiconductor substrate with a channel region interposed therebetween. A first gate electrode is formed over the semiconductor substrate with an insulating film sandwiched therebetween and has a gate length shorter than the length of the channel region. A ferroelectric film is formed to cover the first gate electrode and to have both side portions thereof make contact with the insulating film. A second gate electrode is formed to cover the ferroelectric film.

    摘要翻译： 用于场效应晶体管的源极/漏极区限定在其间插入沟道区的半导体衬底中。 第一栅电极形成在半导体衬底之上，绝缘膜夹在其间，栅极长度短于沟道区的长度。 形成铁电膜以覆盖第一栅电极并且使其两侧部分与绝缘膜接触。 形成第二栅电极以覆盖铁电体膜。