公开(公告)号：US20050082656A1

公开(公告)日：2005-04-21

申请号：US10934409

申请日：2004-09-07

申请人： Chi Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng ,  Shih-Chang Lee

发明人： Chi Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng ,  Shih-Chang Lee

IPC分类号： H01L25/065 ,  H01L23/02

CPC分类号： H01L25/0657 ,  H01L2224/16145 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161

摘要： A Stackable package module comprises a plurality of semiconductor devices in stack. One of the semiconductor devices includes a chip with an active surface and a corresponding back surface, a plurality of solder bumps and a plurality of stud bumps. The solder bumps are formed on the active surface. The stud bumps are formed on the back surface. Each stud bump has a bump body and a protruding trail by wire-bonding and cutting. Bumps of another package are bonded on the stub bumps for replacing known intermediate substrate in conventional stacked package module.

摘要翻译： 可堆叠封装模块包括堆叠中的多个半导体器件。 半导体器件中的一个包括具有活性表面和对应的背面的芯片，多个焊料凸块和多个凸块凸块。 焊料凸块形成在有源表面上。 柱形凸块形成在背面。 每个柱形凸起具有凸起体和通过引线接合和切割的突出轨迹。 另一个封装的凸块被结合在短截线凸起上，用于替代传统堆叠封装模块中的已知中间衬底。

公开(公告)号：US07589408B2

公开(公告)日：2009-09-15

申请号：US11636993

申请日：2006-12-12

申请人： Gwo-Liang Weng ,  Yung-Li Lu ,  Cheng-Yin Lee

发明人： Gwo-Liang Weng ,  Yung-Li Lu ,  Cheng-Yin Lee

IPC分类号： H01L23/02

CPC分类号： H01L25/162 ,  H01L23/3135 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable semiconductor package includes first and second substrates, a semiconductor device, first wires, a supporting element, and a first molding compound. The semiconductor device is disposed on the first substrate. The second substrate is disposed above the semiconductor device, and the area of the second substrate is larger than that of the semiconductor device. The first wires electrically connect the first and second substrates. The supporting element is disposed between the first and second substrates, and supports the second substrate. Some pads of the second substrate are exposed outside the first molding compound. Therefore, the overhang portion of the second substrate will not shake or sway during wire bonding, and the area of the second substrate can be increased to have more devices thereon. Also, the thickness of the second substrate can be reduced, to reduce the overall thickness of the stackable semiconductor package.

摘要翻译： 可堆叠半导体封装包括第一和第二衬底，半导体器件，第一电线，支撑元件和第一模塑料。 半导体器件设置在第一衬底上。 第二基板设置在半导体器件的上方，第二基板的面积大于半导体器件的面积。 第一导线电连接第一和第二基板。 支撑元件设置在第一和第二基板之间，并且支撑第二基板。 第二基板的一些焊盘暴露在第一模塑料的外部。 因此，在引线接合期间，第二基板的突出部分不会摇动或摆动，并且可以增加第二基板的面积以在其上具有更多的装置。 此外，可以减小第二基板的厚度，以减小可堆叠半导体封装的整体厚度。

公开(公告)号：US20080073769A1

公开(公告)日：2008-03-27

申请号：US11828351

申请日：2007-07-26

申请人： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

发明人： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

IPC分类号： H01L23/02 ,  H01L23/52

CPC分类号： H01L24/14 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/1405 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.

摘要翻译： 本发明涉及半导体封装和半导体器件及其制造方法。 制造半导体封装的方法包括：提供衬底; 将芯片附接到所述基板的表面; 形成用于电连接所述芯片和所述基板的多个连接元件; 在所述基板的表面上形成多个第一导电体; 形成用于封装基板，芯片，连接元件和第一导电体的表面的模塑料; 并且除去模塑料的边界部分的一部分，使得模塑料具有两个高度，并且暴露出每个第一导电体的一端。 因此，成型化合物覆盖基板的整个表面，使得基板表面上的接合焊盘不会被污染。

公开(公告)号：US07187070B2

公开(公告)日：2007-03-06

申请号：US10934409

申请日：2004-09-07

申请人： Chi Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng ,  Shih-Chang Lee

发明人： Chi Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng ,  Shih-Chang Lee

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L2224/16145 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161

摘要： A Stackable package module comprises a plurality of semiconductor devices in stack. One of the semiconductor devices includes a chip with an active surface and a corresponding back surface, a plurality of solder bumps and a plurality of stud bumps. The solder bumps are formed on the active surface. The stud bumps are formed on the back surface. Each stud bump has a bump body and a protruding trail by wire-bonding and cutting. Bumps of another package are bonded on the stub bumps for replacing known intermediate substrate in conventional stacked package module.

摘要翻译： 可堆叠封装模块包括堆叠中的多个半导体器件。 半导体器件中的一个包括具有活性表面和对应的背面的芯片，多个焊料凸块和多个凸块凸块。 焊料凸块形成在有源表面上。 柱形凸块形成在背面。 每个柱形凸起具有凸起体和通过引线接合和切割的突出轨迹。 另一个封装的凸块被结合在短截线凸起上，用于替代传统堆叠封装模块中的已知中间衬底。

公开(公告)号：US07642133B2

公开(公告)日：2010-01-05

申请号：US11828352

申请日：2007-07-26

申请人： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

发明人： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L23/02

CPC分类号： H01L24/14 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/1405 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.

摘要翻译： 本发明涉及半导体封装和半导体器件及其制造方法。 制造半导体封装的方法包括：提供衬底; 将芯片附接到所述基板的表面; 形成用于电连接所述芯片和所述基板的多个连接元件; 在所述基板的表面上形成多个第一导电体; 形成用于封装基板，芯片，连接元件和第一导电体的表面的模塑料; 并且除去模塑料的边界部分的一部分，使得模塑料具有两个高度，并且暴露出每个第一导电体的一端。 因此，成型化合物覆盖基板的整个表面，使得基板表面上的接合焊盘不会被污染。

公开(公告)号：US20080023816A1

公开(公告)日：2008-01-31

申请号：US11744189

申请日：2007-05-03

申请人： Gwo-Liang Weng ,  Cheng-Yin Lee

发明人： Gwo-Liang Weng ,  Cheng-Yin Lee

IPC分类号： H01L23/48

CPC分类号： H01L23/3135 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/182 ,  H05K2201/09072 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/049 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package mainly includes a carrier, a package having a first surface and a second surface, a chip and a plurality of bonding wires. The package is disposed on an upper surface of the carrier and electrically connected to the carrier by a plurality of conductive elements, the chip is disposed on the second surface of the package, a plurality of pads of the chip are corresponding to an opening of the carrier, and the bonding pads of the chip are electrically connected to a plurality of conductive pads of the carrier by the bonding wires to lower the height of the semiconductor package and increase the space for circuit layout.

摘要翻译： 半导体封装主要包括载体，具有第一表面和第二表面的封装，芯片和多个接合线。 该封装设置在载体的上表面上并通过多个导电元件与载体电连接，芯片设置在封装的第二表面上，芯片的多个焊盘对应于 载体，并且芯片的接合焊盘通过接合线电连接到载体的多个导电焊盘，以降低半导体封装的高度并增加电路布局的空间。

公开(公告)号：US20070278640A1

公开(公告)日：2007-12-06

申请号：US11636993

申请日：2006-12-12

申请人： Gwo-Liang Weng ,  Yung-Li Lu ,  Cheng-Yin Lee

发明人： Gwo-Liang Weng ,  Yung-Li Lu ,  Cheng-Yin Lee

IPC分类号： H01L23/02

CPC分类号： H01L25/162 ,  H01L23/3135 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a stackable semiconductor package comprising a first substrate, a semiconductor device, a second substrate, a plurality of first wires, a supporting element, and a first molding compound. The semiconductor device is disposed on the first substrate. The second substrate is disposed above the semiconductor device, and the area of the second substrate is larger than that of the semiconductor device. The first wires electrically connect the first substrate and the second substrate. The supporting element is disposed between the first substrate and the second substrate, and is used to support the second substrate. Some pads of the second substrate are exposed outside the first molding compound. Therefore, the overhang portion of the second substrate will not shake or sway during a wire bonding process, and the area of the second substrate can be increased to receive more devices disposed thereon. In addition, the thickness of the second substrate can be reduced, so as to reduce the overall thickness of the stackable semiconductor package.

摘要翻译： 本发明涉及包括第一基板，半导体器件，第二基板，多个第一布线，支撑元件和第一模塑料的可堆叠半导体封装。 半导体器件设置在第一衬底上。 第二基板设置在半导体器件的上方，第二基板的面积大于半导体器件的面积。 第一导线电连接第一基板和第二基板。 支撑元件设置在第一基板和第二基板之间，并且用于支撑第二基板。 第二基板的一些焊盘暴露在第一模塑料的外部。 因此，第二基板的突出部分在引线接合工艺期间不会摇动或摆动，并且可以增加第二基板的面积以接收更多设置在其上的装置。 此外，可以减小第二基板的厚度，从而减小可堆叠半导体封装的整体厚度。

公开(公告)号：US06815833B2

公开(公告)日：2004-11-09

申请号：US10657230

申请日：2003-09-09

申请人： Shih-Chang Lee ,  Gwo-Liang Weng ,  Wei-Chang Tai ,  Cheng-Yin Lee

发明人： Shih-Chang Lee ,  Gwo-Liang Weng ,  Wei-Chang Tai ,  Cheng-Yin Lee

IPC分类号： H01L2348

CPC分类号： H01L23/433 ,  H01L23/3114 ,  H01L23/4334 ,  H01L23/49503 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3011 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012

摘要： A flip chip package mainly comprises a chip, a leadless lead frame. The leadless lead frame has a die paddle and a plurality of leads. The active surface of the chip has a plurality of bonding pads formed thereon. Besides, a plurality of bumps formed on the bonding pads are electrically connected to the chip, the leads and the die paddle. Therein, the die paddle electrically connected to the chip via the bumps not only prevents the chip from being dislocated but also provides another grounding and heat transmission paths to enhance the electrical, thermal and mechanical performance of the flip chip package. Similarly, the bumps formed on the bonding pads of the chip are electrically connected to the leads so as to fix the chip to the lead frame more securely.

公开(公告)号：US07442580B2

公开(公告)日：2008-10-28

申请号：US11637786

申请日：2006-12-13

申请人： Gwo-Liang Weng ,  Cheng-Yin Lee

发明人： Gwo-Liang Weng ,  Cheng-Yin Lee

IPC分类号： H01L21/00

CPC分类号： H01L21/561 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3121 ,  H01L24/48 ,  H01L24/97 ,  H01L27/14618 ,  H01L31/0203 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method of a package structure is provided. Firstly, a substrate having a surface is provided. Next, a chip is disposed on the surface of the substrate. Then, a packing material layer is formed on the surface of the substrate. Next, a this film is pasted on the packing material layer. Then the substrate and the packing material layer are thoroughly cut along a cutting line around the chip by a first cutting blade but the thin film is not cut thoroughly. Next, the substrate is thoroughly cut along at least a part of the cutting line by a second cutting blade but the packing material layer is not thoroughly cut such that a part of the packing material layer is exposed. The width of the second cutting blade is larger than the width of the first cutting blade.

摘要翻译： 提供一种封装结构的制造方法。 首先，提供具有表面的基板。 接下来，将芯片设置在基板的表面上。 然后，在基板的表面上形成包装材料层。 接下来，将该膜粘贴在包装材料层上。 然后，通过第一切割刀沿着芯片周围的切割线彻底切割基板和包装​​材料层，但是薄膜未被彻底切割。 接下来，通过第二切割刀沿着切割线的至少一部分彻底切割基板，但是包装材料层未被彻底切割，使得包装材料层的一部分露出。 第二切割刀片的宽度大于第一切割刀片的宽度。

公开(公告)号：US20080076208A1

公开(公告)日：2008-03-27

申请号：US11828352

申请日：2007-07-26

申请人： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

发明人： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

IPC分类号： H01L21/00

CPC分类号： H01L24/14 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/1405 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.

摘要翻译： 本发明涉及半导体封装和半导体器件及其制造方法。 制造半导体封装的方法包括：提供衬底; 将芯片附接到所述基板的表面; 形成用于电连接所述芯片和所述基板的多个连接元件; 在所述基板的表面上形成多个第一导电体; 形成用于封装基板，芯片，连接元件和第一导电体的表面的模塑料; 并且除去模塑料的边界部分的一部分，使得模塑料具有两个高度，并且暴露出每个第一导电体的一端。 因此，成型化合物覆盖基板的整个表面，使得基板表面上的接合焊盘不会被污染。