公开(公告)号：US20210296387A1

公开(公告)日：2021-09-23

申请号：US17260324

申请日：2019-06-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Ryutaro TSUCHIYA ,  Terumasa NAGANO ,  Takashi BABA

IPC: H01L27/146

Abstract: A semiconductor substrate has a first main surface and a second main surface that oppose each other and a plurality of cells that are arrayed two-dimensionally in a matrix. Each cell includes at least one avalanche photodiode arranged to operate in a Geiger mode. A trench penetrating through the semiconductor substrate is formed in the semiconductor substrate to surround each cell when viewed in a direction orthogonal to the first main surface. A light-shielding member optically separates mutually adjacent cells of the plurality of cells. The light-shielding member includes a first portion extending in a thickness direction of the semiconductor substrate between an opening end of the trench at the first main surface and an opening end of the trench at the second main surface and a second portion projecting out from the second main surface. The insulating film includes a portion that covers the second portion.

公开(公告)号：US20210193707A1

公开(公告)日：2021-06-24

申请号：US17053647

申请日：2019-04-25

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Atsushi ISHIDA ,  Takashi BABA ,  Masanori OKADA ,  Terumasa NAGANO

IPC: H01L27/146 ,  H04N5/359

Abstract: A back-illuminated semiconductor light detecting device includes a light detecting substrate having pixels, and a circuit substrate having signal processing units. For each of the pixels, the light detecting substrate includes avalanche photodiodes respectively having light receiving regions provided in a first main surface side of the semiconductor substrate. In the semiconductor substrate, for each pixel, a trench surrounds at least one region including the light receiving region when viewed from a direction perpendicular to the first main surface. The number of signal processing units is larger than the number of light receiving regions in each pixel, and the number of regions surrounded by the trench in each pixel is equal to or less than the number of light receiving regions in the pixel.

公开(公告)号：US20160254307A1

公开(公告)日：2016-09-01

申请号：US15150859

申请日：2016-05-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Terumasa NAGANO ,  Noburo HOSOKAWA ,  Tomofumi SUZUKI ,  Takashi BABA

IPC: H01L27/146 ,  H01L31/107

CPC classification number: H01L27/14643 ,  H01L27/1446 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14658 ,  H01L31/107

Abstract: A light detection device 1 has a semiconductor light detection element having a semiconductor substrate, and a mounting substrate arranged as opposed to the semiconductor light detection element. The semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in the semiconductor substrate, and electrodes electrically connected to the respective avalanche photodiodes and arranged on a second principal surface side of the semiconductor substrate. The mounting substrate includes a plurality of electrodes arranged corresponding to the respective electrodes on a third principal surface side, and quenching resistors electrically connected to the respective electrodes and arranged on the third principal surface side. The electrodes and the electrodes are connected through bump electrodes.

Abstract translation: 光检测装置1具有半导体光检测元件，该半导体光检测元件具有半导体衬底和与半导体光检测元件相对布置的安装衬底。 半导体光检测元件包括以Geiger模式操作并形成在半导体衬底中的多个雪崩光电二极管，以及电连接到各个雪崩光电二极管并且布置在半导体衬底的第二主表面侧上的电极。 安装基板包括在第三主面侧对应于各个电极布置的多个电极，并且电连接到各个电极并且布置在第三主表面侧上的淬火电阻。 电极和电极通过凸块电极连接。

公开(公告)号：US20140306314A1

公开(公告)日：2014-10-16

申请号：US14314616

申请日：2014-06-25

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Koei YAMAMOTO ,  Terumasa NAGANO ,  Kazuhisa YAMAMURA ,  Kenichi SATO ,  Ryutaro TSUCHIYA

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1443 ,  H01L27/1446 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/14636 ,  H01L28/24 ,  H01L31/02027 ,  H01L31/022416 ,  H01L31/022466 ,  H01L31/107

Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.

Abstract translation: 光接收区域包括多个光检测部分10.光检测部分10具有第二接触电极4A。 第二接触电极4A配置在与第一接触电极3A重叠的位置，以与第一接触电极接触。 此外，电阻层4B继续到第二接触电极4A。

公开(公告)号：US20140110808A1

公开(公告)日：2014-04-24

申请号：US14138950

申请日：2013-12-23

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Kazuhisa YAMAMURA ,  Akira SAKAMOTO ,  Terumasa NAGANO ,  Yoshitaka ISHIKAWA ,  Satoshi KAWAI

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/0232 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/103 ,  H01L31/107 ,  H01L2224/48091 ,  Y02E10/50 ,  H01L2924/00014

Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p− type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p− type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.

Abstract translation: 光电二极管阵列PDA1设置有基板S，其中多个受光通道CH具有n型半导体层32.光电二极管阵列PDA1设置有形成在n型半导体层32上的p型半导体层33，电阻 设置在相应的光检测通道CH上，每个具有连接到信号导线23的一个端部，以及形成在多个光电检测通道CH之间的n型分离部分40。 p型半导体层33在与n型半导体层32的界面处形成pn结，并且具有多个乘法区域AM，用于对应于各个受光通道而与检测目标光入射产生的载流子的雪崩乘法。 在n型半导体层32的表面上形成不规则的凹凸10，并且该表面被光学曝光。

公开(公告)号：US20190181275A1

公开(公告)日：2019-06-13

申请号：US16308116

申请日：2017-05-30

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Ryutaro TSUCHIYA ,  Terumasa NAGANO ,  Yuta TSUJI ,  Go KAWAI ,  Yuki OKUWA

IPC: H01L31/0216 ,  G01J1/44 ,  G01J1/04 ,  H01L31/02 ,  H01L25/04 ,  H01L23/00 ,  H01L31/107 ,  H01L31/0203

Abstract: An optical detection unit includes a first wiring substrate that has a first main surface, a plurality of optical detection chips that each have a light receiving surface and a rear surface on a side opposite to the light receiving surface and are two-dimensionally arranged on the first main surface, a first bump electrode that electrically connects the optical detection chip to the first wiring substrate, a light transmitting portion that is provided on the light receiving surface, and a light shielding portion that has light reflection properties or light absorption properties. The optical detection chip includes a Geiger-mode APD and is mounted on the first wiring substrate by the first bump electrode in a state in which the rear surface faces the first main surface.

公开(公告)号：US20160322405A1

公开(公告)日：2016-11-03

申请号：US15207569

申请日：2016-07-12

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Terumasa NAGANO ,  Noburo HOSOKAWA ,  Tomofumi SUZUKI ,  Takashi BABA

IPC: H01L27/144 ,  H01L49/02 ,  H01L31/0232 ,  H01L31/107 ,  H01L31/02

CPC classification number: H01L27/1446 ,  H01L27/1443 ,  H01L27/14605 ,  H01L28/20 ,  H01L31/02005 ,  H01L31/02322 ,  H01L31/107 ,  H01L2224/11

Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.

公开(公告)号：US20160284744A1

公开(公告)日：2016-09-29

申请号：US15179066

申请日：2016-06-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Koei YAMAMOTO ,  Terumasa NAGANO ,  Kazuhisa YAMAMURA ,  Kenichi SATO ,  Ryutaro TSUCHIYA

IPC: H01L27/144 ,  H01L31/02 ,  H01L49/02 ,  H01L31/107

CPC classification number: H01L27/14643 ,  H01L27/1443 ,  H01L27/1446 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/14636 ,  H01L28/24 ,  H01L31/02027 ,  H01L31/022416 ,  H01L31/022466 ,  H01L31/107

Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.

Abstract translation: 光接收区域包括多个光检测部分10.光检测部分10具有第二接触电极4A。 第二接触电极4A配置在与第一接触电极3A重叠的位置，以与第一接触电极接触。 此外，电阻层4B继续到第二接触电极4A。

公开(公告)号：US20150137298A1

公开(公告)日：2015-05-21

申请号：US14605120

申请日：2015-01-26

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Terumasa NAGANO ,  Noburo HOSOKAWA ,  Tomofumi SUZUKI ,  Takashi BABA

IPC: H01L27/144 ,  H01L31/0232 ,  H01L31/107

CPC classification number: H01L27/1446 ,  H01L27/1443 ,  H01L27/14605 ,  H01L28/20 ,  H01L31/02005 ,  H01L31/02322 ,  H01L31/107 ,  H01L2224/11

Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.

Abstract translation: 半导体光检测元件具有多个通道，每个通道由包括以盖革模式操作的多个雪崩光电二极管的光电二极管阵列组成，与各雪崩光电二极管串联连接的淬火电阻器，以及淬灭电阻器 并联连接 安装基板被配置为使得与第三主面对应的多个电极布置在第三主表面上，并且使得用于处理来自各个通道的输出信号的信号处理单元被布置在第四主表面侧。 在半导体基板中，形成与各信道电连接的信号线的通孔电极。 通孔电极和电极通过凸块电极电连接。

公开(公告)号：US20140061835A1

公开(公告)日：2014-03-06

申请号：US14073249

申请日：2013-11-06

Applicant: Hamamatsu Photonics K.K.

Inventor： Akira SAKAMOTO ,  Takashi IIDA ,  Koei YAMAMOTO ,  Kazuhisa YAMAMURA ,  Terumasa NAGANO

IPC: H01L31/0236

CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: Prepared is an n− type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n− type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n− type semiconductor substrate 1 is formed on the second principal surface 1b side of the n− type semiconductor substrate 1. After formation of the accumulation layer 11, the n− type semiconductor substrate 1 is subjected to a thermal treatment.

Abstract translation: 制备的n型半导体衬底1具有彼此相对的第一主表面1a和第二主表面1b，并且具有形成在第一主表面1a侧上的p +型半导体区域3。 在n型半导体衬底1的第二主表面1b中至少与p +型半导体区域3相对的区域用脉冲激光束照射以形成不规则凹凸。在形成不规则凹凸10之后，积累 在n型半导体衬底1的第二主表面1b侧上形成杂质浓度高于n型半导体衬底1的层11。在形成蓄积层11之后，n型半导体衬底1 进行热处理。