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公开(公告)号：US10579115B2
公开(公告)日：2020-03-03
申请号：US16139109
申请日：2018-09-24
发明人： Thomas Robert Bowden , Alan B Doerr , John Franz , Melvin K Benedict , Joseph Allen , John Norton , Binh Nguyen
IPC分类号： G06F1/20 , G06F1/18 , H01L23/367 , H01L23/40 , G06F13/42
摘要： A thermal management assembly in accordance with one example may include a first thermal management member that includes a first main region that is continuous, a first connection region that is discontinuous, and a first top side. The thermal management assembly may also include a second thermal management member that includes a second main region, a second connection region, and a second top side. The second main region and the second connection region are continuous. The thermal management assembly may further include a connection member to couple the first thermal management member and the second thermal management member to a memory device via the first connection region and the second connection region. The first top side and the second top side are substantially level with a top side of the memory device in a horizontal direction when the first thermal management member and the second thermal management member are coupled to the memory device.
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公开(公告)号：US10114433B2
公开(公告)日：2018-10-30
申请号：US15120511
申请日：2014-04-30
发明人： Thomas Robert Bowden , Allen B Doerr , John Franz , Melvin K Benedict , Joseph Allen , John Norton , Binh Nguyen
摘要： A thermal management assembly in accordance with one example may include a first thermal management member that includes a first main region that is continuous, a first connection region that is discontinuous, and a first top side. The thermal management assembly may also include a second thermal management member that includes a second main region, a second connection region, and a second top side. The second main region and the second connection region are continuous. The thermal management assembly may further include a connection member to couple the first thermal management member and the second thermal management member to a memory device via the first connection region and the second connection region. The first top side and the second top side are substantially level with a top side of the memory device in a horizontal direction when the first thermal management member and the second thermal management member are coupled to the memory device.
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公开(公告)号：US10324777B2
公开(公告)日：2019-06-18
申请号：US15335958
申请日：2016-10-27
摘要： An example device may include processing circuitry and a management controller. The processing circuitry may include a communications interface that includes a first register and a second register. The first register may include a freshness bit and a number of first data bits. The second register may include a number of second data bits that correspond, respectively, to the first data bits. The processing circuitry may write variously to the first data bits in response to detected events, set the freshness bit in response to the management controller reading the first data bits, and reset the freshness bit if any of the first data bits are written to. The management controller may read the first data bits, perform predetermined processing based thereon, write to the second data bits based on the predetermined processing, and request a register transfer. The processing circuitry may, in response to the management controller requesting the register transfer, transfer values of the second data bits to their respectively corresponding first data bits if and only if the freshness bit is currently asserted.
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公开(公告)号：US20190025896A1
公开(公告)日：2019-01-24
申请号：US16139109
申请日：2018-09-24
发明人： Thomas Robert Bowden , Alan B. Doerr , John Franz , Melvin K. Benedict , Joseph Allen , John Norton , Binh Nguyen
IPC分类号： G06F1/20 , G06F13/42 , G06F1/18 , H01L23/40 , H01L23/367
CPC分类号： G06F1/206 , G06F1/185 , G06F1/20 , G06F13/42 , H01L23/367 , H01L23/4093 , H01L2924/0002 , H01L2924/00
摘要： A thermal management assembly in accordance with one example may include a first thermal management member that includes a first main region that is continuous, a first connection region that is discontinuous, and a first top side. The thermal management assembly may also include a second thermal management member that includes a second main region, a second connection region, and a second top side. The second main region and the second connection region are continuous. The thermal management assembly may further include a connection member to couple the first thermal management member and the second thermal management member to a memory device via the first connection region and the second connection region. The first top side and the second top side are substantially level with a top side of the memory device in a horizontal direction when the first thermal management member and the second thermal management member are coupled to the memory device.
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公开(公告)号：US20180121087A1
公开(公告)日：2018-05-03
申请号：US15335958
申请日：2016-10-27
IPC分类号： G06F3/06
CPC分类号： G06F11/00
摘要： An example device may include processing circuitry and a management controller. The processing circuitry may include a communications interface that includes a first register and a second register. The first register may include a freshness bit and a number of first data bits. The second register may include a number of second data bits that correspond, respectively, to the first data bits. The processing circuitry may write variously to the first data bits in response to detected events, set the freshness bit in response to the management controller reading the first data bits, and reset the freshness bit if any of the first data bits are written to. The management controller may read the first data bits, perform predetermined processing based thereon, write to the second data bits based on the predetermined processing, and request a register transfer. The processing circuitry may, in response to the management controller requesting the register transfer, transfer values of the second data bits to their respectively corresponding first data bits if and only if the freshness bit is currently asserted.
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公开(公告)号：US09727462B2
公开(公告)日：2017-08-08
申请号：US14435167
申请日：2013-01-30
IPC分类号： G06F3/06 , G06F12/0804 , G11C14/00
CPC分类号： G06F12/0804 , G06F3/0619 , G06F3/0656 , G06F3/0685 , G06F2003/0691 , G06F2212/1032 , G06F2212/202 , G11C14/0018
摘要： During runtime of a system, a memory controller is caused to relinquish control of a memory module that includes a volatile memory and a non-volatile memory. After the triggering, an indication is activated to the memory module, the indication causing a backup operation in the memory module, the backup operation being controlled by an internal controller in the memory module, and the backup operation involving a transfer of data from the volatile memory to the non-volatile memory in the memory module.
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