公开(公告)号：US20150358993A1

公开(公告)日：2015-12-10

申请号：US14827587

申请日：2015-08-17

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiaodong ZHANG ,  Johan JOHANSSON

IPC: H04W72/12 ,  H04W72/04 ,  H04W24/10

CPC classification number: H04W24/10 ,  H04W72/04 ,  H04W72/1242 ,  H04W72/1284 ,  H04W74/0833

Abstract: A method and device of sending Buffer Status Reports (BSRs) are provided herein. The method includes: determining the type priority sequence of BSR by a user terminal, and selecting and processing one BSR based on the type priority. A user device is also provided. The provided method and device may reduce resource waste because there is no situation that at least two BSRs sending processes are triggered at one time and at least two BSRs are sent at one time.

Abstract translation: 本文提供了一种发送缓冲状态报告（BSR）的方法和装置。 该方法包括：由用户终端确定BSR的类型优先级顺序，并根据类型优先级选择和处理一个BSR。 还提供了用户设备。 所提供的方法和设备可以减少资源浪费，因为不存在一次触发至少两个发送过程的BSR和一次发送至少两个BSR的情况。

公开(公告)号：US20190273044A1

公开(公告)日：2019-09-05

申请号：US16415587

申请日：2019-05-17

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： HuiLi FU ,  Heng LI ,  Xiaodong ZHANG

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00

Abstract: Example chip package structure and packaging methods are described. One example chip package structure includes: a redistribution layer (RDL) and a target chip including an active surface and a back surface, where the active surface of the target chip is connected to a first surface of the RDL. The example chip package structure further includes a substrate, where a first surface of the substrate is opposite to the back surface of the target chip. The example chip package structure further includes an interconnection channel that is located around the target chip. One end of the interconnection channel is connected to the first surface of the RDL, and the other end of the interconnection channel is connected to the first surface of the substrate.

公开(公告)号：US20230012986A1

公开(公告)日：2023-01-19

申请号：US17950610

申请日：2022-09-22

Applicant: Huawei Technologies Co., Ltd.

Inventor： Heng LI ,  Xiaodong ZHANG ,  Tonglong ZHANG ,  Simin WANG

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/48 ,  H01L23/00 ,  H01L21/56

Abstract: This disclosure provides a chip structure, including a first chip and a first protective layer, where the first protective layer covers a first surface of the first chip; and a first conductive connector is vertically disposed in the first protective layer, the first conductive connector penetrates through an upper surface and a lower surface of the first protective layer, one end of the first conductive connector is electrically connected to the first surface of the first chip, the other end of the first conductive connector is exposed to the first protective layer, and the first protective layer is formed by a material whose modulus is greater than a preset value.

公开(公告)号：US20150357307A1

公开(公告)日：2015-12-10

申请号：US14729316

申请日：2015-06-03

Applicant: Huawei Technologies Co., Ltd.

Inventor： Huili FU ,  Xiaodong ZHANG

IPC: H01L25/065 ,  H01L23/528 ,  H01L23/48

CPC classification number: H01L25/0652 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/528 ,  H01L23/5384 ,  H01L23/5389 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24137 ,  H01L2224/73204 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/014

Abstract: A chip stacked package structure includes a first chip and a second chip, where the second chip is stacked with the first chip and the second chip includes a package layer and a first routing layer, where the package layer includes at least two dies and an attaching part configured to attach the at least two dies, where the attaching part is provided with multiple vias, with a part of vias in the multiple vias disposed at an outer periphery of the at least two dies, and the other part of vias in the multiple vias disposed between the at least two dies, and the first routing layer electrically connects the at least two dies; where the package layer is located between the first routing layer and the first chip, an electrically conductive material is provided in the multiple vias.

Abstract translation: 芯片堆叠封装结构包括第一芯片和第二芯片，其中第二芯片与第一芯片堆叠，并且第二芯片包括封装层和第一布线层，其中封装层包括至少两个模具和附接 部件，其构造成附接所述至少两个模具，其中所述附接部件设置有多个通孔，所述多个通孔中的多个通孔中的一部分通孔设置在所述至少两个模具的外周边，并且所述多个通孔中的另一部分通孔 设置在所述至少两个管芯之间的通孔，并且所述第一布线层电连接所述至少两个管芯; 其中封装层位于第一布线层和第一芯片之间，在多个通孔中提供导电材料。

公开(公告)号：US20160173574A1

公开(公告)日：2016-06-16

申请号：US15042837

申请日：2016-02-12

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xiaodong ZHANG ,  Jueping WANG ,  Jianchun WANG ,  Tao PU

IPC: H04L29/08 ,  H04W84/04

CPC classification number: H04L67/10 ,  H04B7/024 ,  H04W84/042 ,  H04W88/085

Abstract: Embodiments of the disclosure provide a radio access method, apparatus, and system, which can implement mutual transmission and processing of collaborative data between sites on a basis of low-cost deployment and high availability, and improve network performance. In the method, a basic DU is deployed in a site, and the method may include: receiving, by a switching device, a first data packet sent by a first basic DU; determining to send the first data packet to a second basic DU for collaborative processing; and sending the first data packet to the second basic DU, so that the second basic DU performs collaborative processing on the first data packet and a second data packet, where the second data packet and the first data packet are of a same data type. Embodiments of the disclosure are applicable to the communications field.

Abstract translation: 本公开的实施例提供一种无线接入方法，装置和系统，其可以在低成本部署和高可用性的基础上实现站点之间的协作数据的相互传输和处理，并且提高网络性能。 在该方法中，将基本DU部署在站点中，该方法可以包括：由交换设备接收由第一基本DU发送的第一数据分组; 确定将所述第一数据分组发送到用于协作处理的第二基本DU; 并且将第一数据分组发送到第二基本DU，使得第二基本DU对第一数据分组和第二数据分组执行协作处理，其中第二数据分组和第一数据分组具有相同的数据类型。 本公开的实施例可应用于通信领域。