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公开(公告)号：US20140183554A1
公开(公告)日：2014-07-03
申请号：US14066460
申请日：2013-10-29
Applicant: Hyundai Motor Company
Inventor： Kyoung-Kook HONG , Jong Seok LEE , Dae Hwan CHUN , Youngkyun JUNG
IPC: H01L29/06 , H01L21/04 , H01L29/66 , H01L29/872 , H01L29/16
CPC classification number: H01L29/0619 , H01L21/0475 , H01L21/3081 , H01L21/3083 , H01L29/0615 , H01L29/1608 , H01L29/66143 , H01L29/872
Abstract: A Schottky barrier diode includes: an n+ type silicon carbide substrate; an n− type epitaxial layer disposed on a first surface of the n+ type silicon carbide substrate and includes an electrode area and a terminal area positioned outside of the electrode area; a first trench and a second trench disposed on the n− type epitaxial layer in the terminal area; a p area disposed under the first trench and the second trench; a Schottky electrode disposed on the n− type epitaxial layer in the electrode area; and an ohmic electrode disposed on a second surface of the n+ type silicon carbide substrate, wherein the first trench and the second trench are adjacently positioned to form a step.
Abstract translation: 肖特基势垒二极管包括：n +型碳化硅衬底; n型外延层，设置在n +型碳化硅基板的第一表面上，并且包括电极区域和位于电极区域外部的端子区域; 设置在所述端子区域中的所述n型外延层上的第一沟槽和第二沟槽; 设置在所述第一沟槽和所述第二沟槽下方的p区域; 设置在电极区域中的n型外延层上的肖特基电极; 以及设置在所述n +型碳化硅衬底的第二表面上的欧姆电极，其中所述第一沟槽和所述第二沟槽相邻地定位以形成台阶。
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公开(公告)号：US20230170762A1
公开(公告)日：2023-06-01
申请号：US17845802
申请日：2022-06-21
Applicant: Hyundai Motor Company , Kia Corporation , IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
Inventor： Jin Ho CHOI , Jong Seok LEE , Sang Jin PARK , Sung Woo HWANG , Jae Hyun KIM , Myung Seop LIM
CPC classification number: H02K9/06 , H02K17/165
Abstract: A rotor cooling structure includes a turbine blower structure provided on first and second sides of a rotor for an induction motor; a refrigerant passage including a plurality of refrigerant passage inlet openings provided on a bottom surface of the turbine blower structure and a plurality of refrigerant passage outlet openings provided at an axial center of the rotor, which fluidically communicates with the refrigerant passage inlet openings and the refrigerant passage outlet openings and is provided along conductor bars of the rotor; and a plurality of micro groove patterns that hold the refrigerant passage outlet openings and are provided on both axial sides of the rotor on an external periphery of the rotor.
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公开(公告)号：US20160148900A1
公开(公告)日：2016-05-26
申请号：US14800607
申请日：2015-07-15
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Kyoung-Kook HONG , Hyun Woo NOH , Youngkyun JUNG , Dae Hwan CHUN , Jong Seok LEE , Su Bin KANG
CPC classification number: H01L24/83 , B23K1/19 , B23K20/02 , B23K20/026 , B23K35/025 , B23K35/3006 , B23K2103/08 , B23K2103/18 , B23K2103/52 , B23K2103/56 , H01L24/27 , H01L24/29 , H01L24/32 , H01L2224/27332 , H01L2224/2741 , H01L2224/27848 , H01L2224/29109 , H01L2224/29139 , H01L2224/29309 , H01L2224/29339 , H01L2224/29499 , H01L2224/32225 , H01L2224/32507 , H01L2224/83097 , H01L2224/832 , H01L2224/83825 , H01L2224/8384 , H01L2224/83906
Abstract: Disclosed is a method for bonding with a silver paste, the method including: coating a silver paste on a semiconductor device or a substrate, the silver paste containing silver and indium; disposing the semiconductor on the substrate; and heating the silver paste to form a bonding layer, wherein the semiconductor device and the substrate are bonded to each other through the bonding layer, and wherein the indium is contained in the silver paste at 40 mole % or less.
Abstract translation: 公开了一种用银膏粘合的方法，该方法包括：在半导体器件或基板上涂覆银膏，含有银和铟的银膏; 将半导体布置在基板上; 并且加热银膏以形成接合层，其中半导体器件和衬底通过接合层彼此接合，并且其中铟含量在40％（摩尔）以下。
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公开(公告)号：US20160141266A1
公开(公告)日：2016-05-19
申请号：US14800613
申请日：2015-07-15
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Kyoung-Kook HONG , Hyun Woo NOH , Youngkyun JUNG , Dae Hwan CHUN , Jong Seok LEE , Su Bin KANG
CPC classification number: H01L24/83 , B23K20/026 , B23K20/16 , B23K20/233 , B23K35/025 , B23K35/264 , B23K35/3006 , B23K2101/42 , B23K2103/166 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L2224/13294 , H01L2224/13313 , H01L2224/13339 , H01L2224/16227 , H01L2224/16505 , H01L2224/29294 , H01L2224/29313 , H01L2224/29339 , H01L2224/32227 , H01L2224/32505 , H01L2224/81191 , H01L2224/81192 , H01L2224/81825 , H01L2224/8184 , H01L2224/83191 , H01L2224/83192 , H01L2224/83825 , H01L2224/8384 , H01L2924/00015 , H01L2924/10272 , H01L2924/201 , H01L2924/2075 , H01L2924/20751 , H05K3/341 , H05K3/3463 , H05K2201/10166 , H05K2203/1131 , H01L2224/29388 , H01L2924/00014 , H01L2224/13388 , H01L2924/00012
Abstract: A method for bonding with a silver paste includes coating a semiconductor device or a substrate with the silver paste. The silver paste contains a plurality of silver particles and a plurality of bismuth particles. The method further includes disposing the semiconductor on the substrate and forming a bonding layer by heating the silver paste, wherein the semiconductor and the substrate are bonded to each other by the bonding layer.
Abstract translation: 用银膏粘合的方法包括用银膏涂覆半导体器件或衬底。 银糊含有多个银颗粒和多个铋颗粒。 该方法还包括将半导体布置在衬底上并通过加热银膏形成接合层，其中半导体和衬底通过接合层彼此接合。
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公开(公告)号：US20140183556A1
公开(公告)日：2014-07-03
申请号：US14079222
申请日：2013-11-13
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Jong Seok LEE , Kyoung-Kook HONG , Dae Hwan CHUN , Youngkyun JUNG
CPC classification number: H01L29/66666 , H01L29/0688 , H01L29/1608 , H01L29/41766 , H01L29/42312 , H01L29/42316 , H01L29/4232 , H01L29/4236 , H01L29/66068 , H01L29/66734 , H01L29/66787 , H01L29/66795 , H01L29/7802 , H01L29/7813 , H01L29/7834
Abstract: The present inventive concept has been made in an effort to increase the width of a channel in a silicon carbide MOSFET using a trench gate.According to the exemplary embodiment of the present inventive concept, the width of a channel can be increased, compared with the conventional art, by forming a plurality of protrusions extending to the p type epitaxial layer on both sides of the trench.
Abstract translation: 本发明构思是为了增加使用沟槽栅极的碳化硅MOSFET中的沟道的宽度。 根据本发明构思的示例性实施例，与传统技术相比，可以通过在沟槽的两侧形成延伸到p型外延层的多个突起来增加通道的宽度。
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Patent Agency Ranking
公开(公告)号：US20170170275A1
公开(公告)日：2017-06-15
申请号：US15342363
申请日：2016-11-03
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Dae Hwan CHUN , Youngkyun JUNG , Nack Yong JOO , Junghee PARK , Jong Seok LEE
CPC classification number: H01L29/0847 , H01L29/0619 , H01L29/0684 , H01L29/1608 , H01L29/78 , H01L29/7828
Abstract: A semiconductor device includes a first n− type layer and a second n− type layer that are sequentially disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench that are disposed at the second n− type layer and are spaced apart from each other; a p type region surrounding a lateral surface and a lower surface of the first trench; an n+ type region disposed on the p type region and the second n− type layer; a gate insulating layer disposed in the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer and the n+ type region disposed in the first trench; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate.
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公开(公告)号：US20160172461A1
公开(公告)日：2016-06-16
申请号：US15051023
申请日：2016-02-23
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Jong Seok LEE , Kyoung-Kook HONG , Dae Hwan CHUN , Youngkyun JUNG
IPC: H01L29/66 , H01L29/423
CPC classification number: H01L29/66068 , H01L29/0878 , H01L29/1608 , H01L29/41766 , H01L29/4236 , H01L29/7813
Abstract: A semiconductor device includes: a plurality of n type pillar regions and an n− type epitaxial layer disposed on a first surface of an n++ type silicon carbide substrate; a p type epitaxial layer and an n+ region disposed on the plurality of n type pillar regions and the n−type epitaxial layer; a trench penetrating the n+ region and the p type epitaxial layer and disposed on the plurality of n type pillar regions and the n−type epitaxial layer; a gate insulating film disposed within the trench; a gate electrode disposed on the gate insulating film; an oxide film disposed on the gate electrode; a source electrode disposed on the p type epitaxial layer, the n+ region, and the oxide film; and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate, wherein each corner portion of the trench is in contact with a corresponding n type pillar region.
Abstract translation: 一种半导体器件包括：多个n型支柱区域和n型外延层，其设置在n ++型碳化硅衬底的第一表面上; p型外延层和n +区域，设置在多个n型支柱区域和n型外延层上; 穿过n +区的沟槽和p型外延层，并且设置在多个n型支柱区域和n型外延层上; 设置在所述沟槽内的栅极绝缘膜; 设置在所述栅极绝缘膜上的栅电极; 设置在栅电极上的氧化膜; 设置在p型外延层上的源电极，n +区和氧化膜; 以及设置在n +型碳化硅衬底的第二表面上的漏电极，其中沟槽的每个拐角部分与相应的n型柱状区域接触。
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公开(公告)号：US20140183558A1
公开(公告)日：2014-07-03
申请号：US14098359
申请日：2013-12-05
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Jong Seok LEE , Kyoung-Kook HONG , Dae Hwan CHUN , Youngkyun JUNG
IPC: H01L29/872 , H01L29/16 , H01L29/66
CPC classification number: H01L29/872 , H01L29/0615 , H01L29/0619 , H01L29/0804 , H01L29/1608 , H01L29/6606
Abstract: A schottky barrier diode includes: an n− type epitaxial layer that is disposed at a first surface of an n+ type silicon carbide substrate; a plurality of n type pillar areas that are disposed at the inside of the n− type epitaxial layer and that are disposed at a first portion of the first surface of the n+ type silicon carbide substrate; a p type area that is disposed at the inside of the n− type epitaxial layer and that is extended in a direction perpendicular to the n type pillar areas; a plurality of p+ areas in which the n− type epitaxial layer is disposed at a surface thereof and that are separated from the n type pillar areas and the p type area; a schottky electrode that is disposed on the n− type epitaxial layer and the p+ areas; and an ohmic electrode that is disposed at a second surface of the n+ type silicon carbide substrate.
Abstract translation: 肖特基势垒二极管包括：n型外延层，其设置在n +型碳化硅衬底的第一表面; 多个n型支柱区域，其设置在n型外延层的内部，并且设置在n +型碳化硅衬底的第一表面的第一部分; p型区域，其设置在所述n型外延层的内部，并且在垂直于所述n型支柱区域的方向上延伸; 多个p +区域，其中n型外延层设置在其表面并且与n型支柱区域和p型区域分离; 设置在n型外延层和p +区域上的肖特基电极; 以及设置在n +型碳化硅衬底的第二表面的欧姆电极。
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公开(公告)号：US20140167071A1
公开(公告)日：2014-06-19
申请号：US14025789
申请日：2013-09-12
Applicant: Hyundai Motor Company
Inventor： Jong Seok LEE , Kyoung-Kook HONG , Dae Hwan CHUN , Youngkyun JUNG
CPC classification number: H01L29/66068 , H01L29/0878 , H01L29/1608 , H01L29/41766 , H01L29/4236 , H01L29/7813
Abstract: A semiconductor device includes: a plurality of n type pillar regions and an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate; a p type epitaxial layer and an n+ region disposed on the plurality of n type pillar regions and the n− type epitaxial layer; a trench penetrating the n+ region and the p type epitaxial layer and disposed on the plurality of n type pillar regions and the n− type epitaxial layer; a gate insulating film disposed within the trench; a gate electrode disposed on the gate insulating film; an oxide film disposed on the gate electrode; a source electrode disposed on the p type epitaxial layer, the n+ region, and the oxide film; and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate, wherein each corner portion of the trench is in contact with a corresponding n type pillar region.
Abstract translation: 半导体器件包括：n +型碳化硅衬底的第一表面上的多个n型支柱区域和n型外延层; p型外延层和n +区，设置在所述多个n型支柱区域和所述n型外延层上; 穿过n +区的沟槽和p型外延层，并且设置在多个n型支柱区域和n型外延层上; 设置在所述沟槽内的栅极绝缘膜; 设置在所述栅极绝缘膜上的栅电极; 设置在栅电极上的氧化膜; 设置在p型外延层上的源电极，n +区和氧化膜; 以及设置在n +型碳化硅衬底的第二表面上的漏电极，其中沟槽的每个拐角部分与相应的n型柱状区域接触。
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公开(公告)号：US20180013014A1
公开(公告)日：2018-01-11
申请号：US15374468
申请日：2016-12-09
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Dae Hwan CHUN , Youngkyun JUNG , Nack Yong JOO , Junghee PARK , Jong Seok LEE
CPC classification number: H01L29/872 , H01L21/046 , H01L29/0619 , H01L29/0688 , H01L29/0692 , H01L29/0696 , H01L29/08 , H01L29/1608 , H01L29/6606
Abstract: A Schottky barrier diode according to an exemplary embodiment of the present disclosure includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n− type layer and separated from each other; an anode disposed on the n− type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate, wherein the p type region is in plural, has a hexagonal shape on the plane, and is arranged in a matrix shape, and the n− type layer disposed between the p+ type region and the p type region has a hexagonal shape on the plane and encloses the p type region.
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