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    Rounded three-dimensional germanium active channel for transistors and sensors
    2.
    发明授权
    Rounded three-dimensional germanium active channel for transistors and sensors 失效
    用于晶体管和传感器的圆形三维锗活性通道

    公开(公告)号：US08101473B2

    公开(公告)日：2012-01-24

    申请号：US12501259

    申请日：2009-07-10

    申请人： Hans Cho ,  Theodore I Kamins ,  Nathaniel Quitoriano

    发明人： Hans Cho ,  Theodore I Kamins ,  Nathaniel Quitoriano

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： H01L29/423 ,  B82Y10/00 ,  G01N27/414 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/02667 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/125 ,  H01L29/205 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7854

    摘要： A process is provided for fabricating rounded three-dimensional germanium active channels for transistors and sensors. For forming sensors, the process comprises providing a crystalline silicon substrate; depositing an oxide mask on the crystalline silicon substrate; patterning the oxide mask with trenches to expose linear regions of the silicon substrate; epitaxially grow germanium selectively in the trenches, seeded from the silicon wafer; optionally etching the SiO2 mask partially, so that the cross section resembles a trapezoid on a stem; and annealing at an elevated temperature. The annealing process forms the rounded channel. For forming transistors, the process further comprises depositing and patterning a gate oxide and gate electrode onto this structure to form the gate stack of a MOSFET device; and after patterning the gate, implanting dopants into the source and drain located on the parts of the germanium cylinder on either side of the gate line.

    摘要翻译： 提供了一种用于制造用于晶体管和传感器的圆形三维锗活性通道的工艺。 对于形成传感器，该方法包括提供晶体硅衬底; 在所述晶体硅衬底上沉积氧化物掩模; 用沟槽图案化氧化物掩模以暴露硅衬底的线性区域; 在沟槽中选择性地外延生长锗，从硅晶片接种; 可选地部分地蚀刻SiO 2掩模，使得横截面类似于杆上的梯形; 并在高温退火。 退火过程形成圆形通道。 为了形成晶体管，该工艺还包括将栅极氧化物和栅电极沉积并图案化到该结构上以形成MOSFET器件的栅叠层; 并且在图案化栅极之后，将掺杂剂注入位于栅极线两侧的锗圆筒部分上的源极和漏极。

    ROUNDED THREE-DIMENSIONAL GERMANIUM ACTIVE CHANNEL FOR TRANSISTORS AND SENSORS
    3.
    发明申请
    ROUNDED THREE-DIMENSIONAL GERMANIUM ACTIVE CHANNEL FOR TRANSISTORS AND SENSORS 失效
    用于晶体管和传感器的三维三维有源通道

    公开(公告)号：US20110006348A1

    公开(公告)日：2011-01-13

    申请号：US12501259

    申请日：2009-07-10

    申请人： Hans Cho ,  Theodore I. Kamins ,  Nathaniel Quitoriano

    发明人： Hans Cho ,  Theodore I. Kamins ,  Nathaniel Quitoriano

    IPC分类号： H01L29/423 ,  H01L21/336 ,  H01L29/78

    CPC分类号： H01L29/423 ,  B82Y10/00 ,  G01N27/414 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/02667 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/125 ,  H01L29/205 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7854

    摘要： A process is provided for fabricating rounded three-dimensional germanium active channels for transistors and sensors. For forming sensors, the process comprises providing a crystalline silicon substrate; depositing an oxide mask on the crystalline silicon substrate; patterning the oxide mask with trenches to expose linear regions of the silicon substrate; epitaxially grow germanium selectively in the trenches, seeded from the silicon wafer; optionally etching the SiO2 mask partially, so that the cross section resembles a trapezoid on a stem; and annealing at an elevated temperature. The annealing process forms the rounded channel. For forming transistors, the process further comprises depositing and patterning a gate oxide and gate electrode onto this structure to form the gate stack of a MOSFET device; and after patterning the gate, implanting dopants into the source and drain located on the parts of the germanium cylinder on either side of the gate line.

    摘要翻译： 提供了一种用于制造用于晶体管和传感器的圆形三维锗活性通道的工艺。 对于形成传感器，该方法包括提供晶体硅衬底; 在所述晶体硅衬底上沉积氧化物掩模; 用沟槽图案化氧化物掩模以暴露硅衬底的线性区域; 在沟槽中选择性地外延生长锗，从硅晶片接种; 可选地部分地蚀刻SiO 2掩模，使得横截面类似于杆上的梯形; 并在高温退火。 退火过程形成圆形通道。 为了形成晶体管，该工艺还包括将栅极氧化物和栅电极沉积并图案化到该结构上以形成MOSFET器件的栅叠层; 并且在图案化栅极之后，将掺杂剂注入位于栅极线两侧的锗圆筒部分上的源极和漏极。

    Semiconductor device and method for strain controlled optical absorption
    5.
    发明授权
    Semiconductor device and method for strain controlled optical absorption 有权
    用于应变控制光吸收的半导体器件和方法

    公开(公告)号：US07964927B2

    公开(公告)日：2011-06-21

    申请号：US12243155

    申请日：2008-10-01

    申请人： Nathaniel Quitoriano ,  Theodore I. Kamins

    发明人： Nathaniel Quitoriano ,  Theodore I. Kamins

    IPC分类号： H01L31/0232

    CPC分类号： H01L31/0248

    摘要： A semiconductor device which has controlled optical absorption includes a substrate, and a semiconductor layer supported by the substrate. The semiconductor has variable optical absorption at a predetermined optical frequency in relationship to a bandgap of the semiconductor layer. Also included is a strain application structure coupled to the semiconductor layer to create a strain in the semiconductor layer to change the semiconductor bandgap.

    摘要翻译： 具有受控光吸收的半导体器件包括衬底和由衬底支撑的半导体层。 半导体在与半导体层的带隙有关的预定光频率下具有可变的光吸收。 还包括耦合到半导体层的应变施加结构，以在半导体层中产生应变以改变半导体带隙。

    Multi-Level Nanowire Structure And Method Of Making The Same
    7.
    发明申请
    Multi-Level Nanowire Structure And Method Of Making The Same 有权
    多层次纳米线结构及其制作方法

    公开(公告)号：US20100019355A1

    公开(公告)日：2010-01-28

    申请号：US12243853

    申请日：2008-10-01

    申请人： Theodore I Kamins ,  Nathaniel Quitoriano

    发明人： Theodore I Kamins ,  Nathaniel Quitoriano

    IPC分类号： H01L21/20 ,  H01L29/04

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L21/0237 ,  H01L21/02433 ,  H01L21/02521 ,  H01L21/02573 ,  H01L21/02603 ,  H01L21/02609 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L31/035281 ,  H01L31/03529 ,  Y02E10/50 ,  Y10S977/762 ,  Y10S977/778 ,  Y10S977/813

    摘要： A method for making a multi-level nanowire structure includes establishing a first plurality of nanowires on a substrate surface, wherein at least some of the nanowires are i) aligned at a predetermined crystallographically defined angle with respect to the substrate surface, ii) aligned substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii. An insulating layer is established between the nanowires of the first plurality such that one of two opposed ends of at least some of the nanowires positioned i) at the predetermined crystallographically defined angle, ii) substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii is exposed. Regions are grown from each of the exposed ends, and such regions coalesce to form a substantially continuous layer on the insulating layer. A second plurality of nanowires is established on the substantially continuous layer.

    摘要翻译： 制造多层纳米线结构的方法包括在衬底表面上建立第一多个纳米线，其中至少一些纳米线是i）相对于衬底表面以预定的晶体学限定的角度排列，ii）基本上对准 垂直于衬底表面，或iii）i和ii的组合。 在第一多个纳米线之间建立绝缘层，使得至少一些纳米线的两个相对端中的一个位于i）处于预定的晶体学限定的角度，ii）相对于衬底表面基本垂直，或iii） i和ii的组合被暴露。 区域从每个暴露端生长，并且这些区域聚结以在绝缘层上形成基本上连续的层。 在基本连续的层上建立第二多个纳米线。

    Device for absorbing or emitting light and methods of making the same
    8.
    发明授权
    Device for absorbing or emitting light and methods of making the same 有权
    用于吸收或发射光的装置及其制造方法

    公开(公告)号：US08030729B2

    公开(公告)日：2011-10-04

    申请号：US12243804

    申请日：2008-10-01

    申请人： Nathaniel Quitoriano ,  Theodore I. Kamins

    发明人： Nathaniel Quitoriano ,  Theodore I. Kamins

    IPC分类号： H01L31/06

    CPC分类号： H01L31/101 ,  H01L21/02573 ,  H01L21/02603 ,  H01L21/02617 ,  H01L21/02645 ,  H01L27/14647 ,  Y10S977/932 ,  Y10S977/95 ,  Y10S977/953

    摘要： A device disclosed herein includes a first layer, a second layer, and a first plurality of nanowires established between the first layer and the second layer. The first plurality of nanowires is formed of a first semiconductor material. The device further includes a third layer, and a second plurality of nanowires established between the second and third layers. The second plurality of nanowires is formed of a second semiconductor material having a bandgap that is the same as or different from a bandgap of the first semiconductor material.

    摘要翻译： 本文公开的装置包括在第一层和第二层之间建立的第一层，第二层和第一多个纳米线。 第一多个纳米线由第一半导体材料形成。 该装置还包括第二层和第三层之间建立的第三层和第二组纳米线。 第二多个纳米线由具有与第一半导体材料的带隙相同或不同的带隙的第二半导体材料形成。

    Semiconductor Device And Method For Strain Controlled Optical Absorption
    9.
    发明申请
    Semiconductor Device And Method For Strain Controlled Optical Absorption 有权
    用于应变控制光吸收的半导体器件和方法

    公开(公告)号：US20090108387A1

    公开(公告)日：2009-04-30

    申请号：US12243155

    申请日：2008-10-01

    申请人： Nathaniel Quitoriano ,  Theodore I. Kamins

    发明人： Nathaniel Quitoriano ,  Theodore I. Kamins

    IPC分类号： H01L31/0232 ,  H01L31/0248 ,  H01L21/02

    CPC分类号： H01L31/0248

    摘要： A semiconductor device which has controlled optical absorption includes a substrate, and a semiconductor layer supported by the substrate. The semiconductor has variable optical absorption at a predetermined optical frequency in relationship to a bandgap of the semiconductor layer. Also included is a strain application structure coupled to the semiconductor layer to create a strain in the semiconductor layer to change the semiconductor bandgap.

    摘要翻译： 具有受控光吸收的半导体器件包括衬底和由衬底支撑的半导体层。 半导体在与半导体层的带隙有关的预定光频率下具有可变的光吸收。 还包括耦合到半导体层的应变施加结构，以在半导体层中产生应变以改变半导体带隙。

    Multi-level nanowire structure and method of making the same
    10.
    发明授权
    Multi-level nanowire structure and method of making the same 有权
    多层纳米线结构及制作方法

    公开(公告)号：US08198706B2

    公开(公告)日：2012-06-12

    申请号：US12243853

    申请日：2008-10-01

    申请人： Theodore I. Kamins ,  Nathaniel Quitoriano

    发明人： Theodore I. Kamins ,  Nathaniel Quitoriano

    IPC分类号： H01L29/04 ,  H01L21/20

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L21/0237 ,  H01L21/02433 ,  H01L21/02521 ,  H01L21/02573 ,  H01L21/02603 ,  H01L21/02609 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L31/035281 ,  H01L31/03529 ,  Y02E10/50 ,  Y10S977/762 ,  Y10S977/778 ,  Y10S977/813

    摘要： A method for making a multi-level nanowire structure includes establishing a first plurality of nanowires on a substrate surface, wherein at least some of the nanowires are i) aligned at a predetermined crystallographically defined angle with respect to the substrate surface, ii) aligned substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii. An insulating layer is established between the nanowires of the first plurality such that one of two opposed ends of at least some of the nanowires positioned i) at the predetermined crystallographically defined angle, ii) substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii is exposed. Regions are grown from each of the exposed ends, and such regions coalesce to form a substantially continuous layer on the insulating layer. A second plurality of nanowires is established on the substantially continuous layer.

    摘要翻译： 制造多层纳米线结构的方法包括在衬底表面上建立第一多个纳米线，其中至少一些纳米线是i）相对于衬底表面以预定的晶体学限定的角度排列，ii）基本上对准 垂直于衬底表面，或iii）i和ii的组合。 在第一多个纳米线之间建立绝缘层，使得至少一些纳米线的两个相对端中的一个位于i）处于预定的晶体学限定的角度，ii）相对于衬底表面基本垂直，或iii） i和ii的组合被暴露。 区域从每个暴露端生长，并且这些区域聚结以在绝缘层上形成基本上连续的层。 在基本连续的层上建立第二多个纳米线。