公开(公告)号：US06326412B1

公开(公告)日：2001-12-04

申请号：US09706470

申请日：2000-11-03

申请人： Hans Weber ,  Peter Gansen

发明人： Hans Weber ,  Peter Gansen

IPC分类号： C08J904

CPC分类号： C08G18/4202 ,  C08G18/1841 ,  C08G18/485 ,  C08G18/6674 ,  C08G2101/0008 ,  C08G2101/0033 ,  C08G2101/005 ,  C08G2101/0083

摘要： The present invention relates to a polyurethane foam and associated production process, in particular a polyurethane integral foam and associated production process, whereby a carbamate or a mixture of carbamates is used simultaneously as propellant and as catalyst, and the carbamate or the carbamates have the general Formula I: wherein: R1 and R2 represent the same or different alkyl radicals, R3 and R4 represent the same or different radicals and denote hydrogen or alkyl radicals, R5 denotes hydrogen, an alkanol radical, a polyether monool radical or the radical characterized by X, n represents 2 or 3.

摘要翻译： 本发明涉及聚氨酯泡沫及其相关联的制备方法，特别是聚氨酯整体泡沫及其相关制备方法，其中氨基甲酸酯或氨基甲酸酯的混合物同时用作推进剂和催化剂，氨基甲酸酯或氨基甲酸酯具有一般性 式I：其中：R1和R2表示相同或不同的烷基，R3和R4表示相同或不同的基团，表示氢或烷基，R5表示氢，链烷醇基，聚醚一元基或X表示的基团， n表示2或3。

公开(公告)号：US08901642B2

公开(公告)日：2014-12-02

申请号：US13414037

申请日：2012-03-07

申请人： Hans Weber ,  Franz Hirler

发明人： Hans Weber ,  Franz Hirler

IPC分类号： H01L29/78

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/32 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/66727

摘要： A semiconductor device includes a semiconductor body having a first surface defining a vertical direction and a source metallization arranged on the first surface. In a vertical cross-section the semiconductor body further includes: a drift region of a first conductivity type; at least two compensation regions of a second conductivity type each of which forms a pn-junction with the drift region and is in low resistive electric connection with the source metallization; a drain region of the first conductivity type having a maximum doping concentration higher than a maximum doping concentration of the drift region, and a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and includes at least one of a floating field plate and a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer.

摘要翻译： 半导体器件包括具有限定垂直方向的第一表面和布置在第一表面上的源极金属化的半导体本体。 在垂直横截面中，半导体主体还包括：第一导电类型的漂移区; 至少两个第二导电类型的补偿区域，每个补偿区域与漂移区域形成pn结并与源极金属化处于低电阻电连接; 具有高于漂移区的最大掺杂浓度的最大掺杂浓度的第一导电类型的漏极区和布置在漂移区和漏极区之间的第一导电类型的第三半导体层，并且包括以下中的至少一个： 浮置场板和第二导电类型的浮置半导体区域形成与第三半导体层的pn结。

公开(公告)号：US20140001552A1

公开(公告)日：2014-01-02

申请号：US13539973

申请日：2012-07-02

申请人： Franz Hirler ,  Hans Weber ,  Hans-Joachim Schulze ,  Uwe Wahl

发明人： Franz Hirler ,  Hans Weber ,  Hans-Joachim Schulze ,  Uwe Wahl

IPC分类号： H01L29/772 ,  H01L21/20 ,  H01L29/02

CPC分类号： H01L29/66712 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/161 ,  H01L29/167 ,  H01L29/408 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/8611

摘要： A drift layer of a super junction semiconductor device includes first portions of a first conductivity type and second portions of a second conductivity type opposite to the first conductivity type. The first and second portions are formed both in a cell area and in an edge area surrounding the cell area, wherein an on-state or forward current through the drift layer flows through the first portions in the cell area. At least one of the first and second portions other than the first portions in the cell area includes an auxiliary structure or contains auxiliary impurities to locally reduce the avalanche rate. Locally reducing the avalanche rate increases the total voltage blocking capability of the super junction semiconductor device.

摘要翻译： 超结半导体器件的漂移层包括第一导电类型的第一部分和与第一导电类型相反的第二导电类型的第二部分。 第一和第二部分在单元区域和围绕单元区域的边缘区域中形成，其中通过漂移层的导通状态或正向电流流过单元区域中的第一部分。 电池区域中除了第一部分之外的第一和第二部分中的至少一个包括辅助结构或包含辅助杂质以局部降低雪崩率。 本地降低雪崩率提高了超结半导体器件的总电压阻断能力。

公开(公告)号：US20130193525A1

公开(公告)日：2013-08-01

申请号：US13362038

申请日：2012-01-31

申请人： Rolf Weis ,  Gerald Deboy ,  Michael Treu ,  Armin Willmeroth ,  Hans Weber

发明人： Rolf Weis ,  Gerald Deboy ,  Michael Treu ,  Armin Willmeroth ,  Hans Weber

IPC分类号： H01L27/06

CPC分类号： H01L27/0207 ,  H01L21/84 ,  H01L21/845 ,  H01L27/06 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/4236 ,  H01L29/78 ,  H03K17/063 ,  H03K17/102

摘要： A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices, and one of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device. Each of the second semiconductor devices has at least one device characteristic. At least one device characteristic of at least one of the second semiconductor devices is different from the corresponding device characteristic of others of the second semiconductor devices.

公开(公告)号：US20130154030A1

公开(公告)日：2013-06-20

申请号：US13331843

申请日：2011-12-20

申请人： Hans Weber

发明人： Hans Weber

IPC分类号： H01L29/06 ,  H01L29/872 ,  H01L29/78

CPC分类号： H01L29/872 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/861

摘要： A semiconductor device includes a drift region of a first doping type, a junction between the drift region and a device region, a compensation region of a second doping type, and at least one field electrode structure arranged between the drift region and the compensation region. The at least one field electrode includes a field electrode and a field electrode dielectric adjoining the field electrode. The field electrode dielectric is arranged between the field electrode and the drift region and between the field electrode and the compensation. The field electrode dielectric includes a first opening through which the field electrode is coupled to drift region and a second opening through which the field electrode is coupled to the compensation region.

摘要翻译： 半导体器件包括第一掺杂类型的漂移区域，漂移区域和器件区域之间的结，第二掺杂类型的补偿区域以及布置在漂移区域和补偿区域之间的至少一个场电极结构。 所述至少一个场电极包括场电极和邻接所述场电极的场电极电介质。 场电极介质布置在场电极和漂移区之间以及场电极和补偿之间。 场电极电介质包括第一开口，场电极通过该第一开口耦合到漂移区，第二开口通过该场电极耦合到补偿区。

公开(公告)号：US20130082322A1

公开(公告)日：2013-04-04

申请号：US13250013

申请日：2011-09-30

申请人： Hans Weber ,  Franz Hirler ,  Stefan Gamerith

发明人： Hans Weber ,  Franz Hirler ,  Stefan Gamerith

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L29/872 ,  H01L29/0653 ,  H01L29/407 ,  H01L29/7813 ,  H01L29/868

摘要： Disclosed is a semiconductor device including a drift region of a first doping type, a junction between the drift region and a device region, and at least one field electrode structure in the drift region. The field electrode structure includes a field electrode, a field electrode dielectric adjoining the field electrode and arranged between the field electrode and the drift region, and having an opening, at least one of a field stop region and a generation region.

摘要翻译： 公开了一种半导体器件，其包括第一掺杂类型的漂移区域，漂移区域和器件区域之间的结以及漂移区域中的至少一个场电极结构。 场电极结构包括场电极，与场电极相邻并且设置在场电极和漂移区之间的场电极电介质，并且具有开场，场停止区和发生区中的至少一个。

公开(公告)号：US20110147817A1

公开(公告)日：2011-06-23

申请号：US12640974

申请日：2009-12-17

申请人： Hans-Joachim Schulze ,  Helmut Strack ,  Hans Weber

发明人： Hans-Joachim Schulze ,  Helmut Strack ,  Hans Weber

IPC分类号： H01L29/78 ,  H01L29/02 ,  H01L21/336 ,  H01L21/02

CPC分类号： H01L29/7813 ,  H01L21/02126 ,  H01L21/02238 ,  H01L21/76251 ,  H01L28/40 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/407 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/861 ,  H01L29/872

摘要： Semiconductor component having an oxide layer. One embodiment includes a first semiconductor region and a second semiconductor region. An oxide layer is arranged between the first and second semiconductor region. The first semiconductor region and the oxide layer form a first semiconductor-oxide interface. The second semiconductor region and the oxide layer form a second semiconductor-oxide interface. The oxide layer has a chlorine concentration, the chlorine concentration having a first maximum in the region of the first semiconductor-oxide interface, and having a second maximum in the region of the second semiconductor-oxide interface.

摘要翻译： 具有氧化物层的半导体部件。 一个实施例包括第一半导体区域和第二半导体区域。 氧化物层布置在第一和第二半导体区域之间。 第一半导体区域和氧化物层形成第一半导体 - 氧化物界面。 第二半导体区域和氧化物层形成第二半导体 - 氧化物界面。 氧化物层具有氯浓度，氯浓度在第一半导体 - 氧化物界面的区域具有第一最大值，并且在第二半导体 - 氧化物界面的区域具有第二最大值。

公开(公告)号：US20110101451A1

公开(公告)日：2011-05-05

申请号：US12984934

申请日：2011-01-05

申请人： Anton Mauder ,  Stefan Sedlmaier ,  Ralf Erichsen ,  Hans Weber ,  Oliver Haeberlen ,  Franz Hirler

发明人： Anton Mauder ,  Stefan Sedlmaier ,  Ralf Erichsen ,  Hans Weber ,  Oliver Haeberlen ,  Franz Hirler

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L21/76224 ,  H01L27/0629 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7804

摘要： A semiconductor component having a semiconductor body having a first and a second side, an edge and an edge region adjacent to the edge in a lateral direction is described.

摘要翻译： 描述了具有半导体本体的半导体部件，该半导体本体具有第一和第二侧面，边缘和与横向方向上的边缘相邻的边缘区域。

公开(公告)号：US07303961B2

公开(公告)日：2007-12-04

申请号：US11027496

申请日：2004-12-30

申请人： Hans Weber ,  Gerhard Silvester Neugschwandtner ,  Martin Poelzl

发明人： Hans Weber ,  Gerhard Silvester Neugschwandtner ,  Martin Poelzl

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4232 ,  H01L29/42368 ,  H01L29/4238

摘要： A method for producing a junction region (2, 5, 6, 7) between a trench (3) and a semiconductor zone (2) surrounding the trench (3) in a trench semiconductor device (1) has the following steps: application of an oxidation barrier layer (15) to an upper part (O) of the inner walls of the trench (3), and production of a first oxide layer (7) on a lower part (U) of the inner walls, said lower part not being covered by the oxidation barrier layer (15), by means of thermal oxidation of the uncovered (U) part of the inner walls.

摘要翻译： 在沟槽半导体器件（1）中，在沟槽（3）和围绕沟槽（3）的半导体区域（2）之间产生结区域（2,5,6,7）的方法具有以下步骤：应用 氧化阻挡层（15）到所述沟槽（3）的内壁的上部（O），以及在所述内壁的下部（U）上产生第一氧化物层（7），所述下部 不被氧化阻挡层（15）覆盖，通过内壁的未覆盖（U）部分的热氧化。

公开(公告)号：US20060164439A1

公开(公告)日：2006-07-27

申请号：US11278722

申请日：2006-04-05

申请人： John Dengler ,  Erik Garci ,  Brian Cox ,  Kenneth Tolman ,  Hans Weber ,  Gerard Hall

发明人： John Dengler ,  Erik Garci ,  Brian Cox ,  Kenneth Tolman ,  Hans Weber ,  Gerard Hall

IPC分类号： G09G5/00

CPC分类号： G06T15/20 ,  H04N5/272 ,  H04N5/2723

摘要： Systems and methods for augmenting an image sequence with content are disclosed. A system may include a character generator, a graphics frame buffer and a graphics insertion system. The character generator may generate pixel block content. The graphics frame buffer may be in communication with the character generator and store the pixel block content. The graphics insertion system may be in communication with the first graphics frame buffer. The graphics insertion system may be used to retrieve the pixel block content from the first graphics frame buffer and modify an image sequence with an insert graphic based on the pixel block content.

摘要翻译： 公开了用于增加具有内容的图像序列的系统和方法。 系统可以包括字符发生器，图形帧缓冲器和图形插入系统。 字符生成器可以生成像素块内容。 图形帧缓冲器可以与字符发生器通信并存储像素块内容。 图形插入系统可以与第一图形帧缓冲器通信。 图形插入系统可以用于从第一图形帧缓冲器检索像素块内容，并且基于像素块内容使用插入图形修改图像序列。