Phase comparator and clock data recovery circuit
    2.
    发明申请
    Phase comparator and clock data recovery circuit 失效
    相位比较器和时钟数据恢复电路

    公开(公告)号:US20120081152A1

    公开(公告)日:2012-04-05

    申请号:US13137566

    申请日:2011-08-26

    IPC分类号: H03L7/00

    CPC分类号: H03L7/087 H03L7/091 H03L7/097

    摘要: The present disclosure provides a phase comparator including, a first latch, a second latch, a first detection circuit, a second detection circuit, and a charge-pump circuit having the function of a changeover switch.

    摘要翻译: 本公开提供了一种相位比较器,包括第一锁存器,第二锁存器,第一检测电路,第二检测电路和具有切换开关功能的电荷泵电路。

    Interface circuit
    6.
    发明授权
    Interface circuit 有权
    接口电路

    公开(公告)号:US09191136B2

    公开(公告)日:2015-11-17

    申请号:US13600858

    申请日:2012-08-31

    摘要: A video signal and an audio signal are TMDS transmitted from a source device to a sink device. Through a reserved line and a HPD line provided separately from a TMDS transmission line, an Ethernet™ signal is bidirectionally transmitted, and also, a SPDIF signal is transmitted from the sink device to the source device. The Ethernet™ signal bidirectionally transmitted between Ethernet™ transmitter/receiver circuits is differentially transmitted by an amplifier and is received by the amplifier. The SPDIF signal from a SPDIF transmitter circuit is common-mode transmitted from an adder and is received by the adder to be supplied to the SPDIF receiver circuit.

    摘要翻译: 视频信号和音频信号是从源设备传送到宿设备的TMDS。 通过与TMDS传输线分开提供的预留线路和HPD线路,双向传输以太网™信号,并且还将SPDIF信号从宿设备发送到源设备。 以太网™发送器/接收器电路之间双向传输的以太网™信号由放大器进行差分传输,由放大器接收。 来自SPDIF发送器电路的SPDIF信号是从加法器发送的共模信号,并被加法器接收以提供给SPDIF接收器电路。

    Output circuit for a bus
    8.
    发明授权
    Output circuit for a bus 有权
    总线输出电路

    公开(公告)号:US08779808B2

    公开(公告)日:2014-07-15

    申请号:US11984714

    申请日:2007-11-21

    IPC分类号: H03B1/00 H03K3/00

    CPC分类号: G06F13/4072

    摘要: An output circuit for a bus whose output node is connected to a bus, including a first current source connected to a first reference potential, a first semiconductor switching element connected between the first current source and the output node, a current control circuit for controlling the first semiconductor switching element such that the first current source and the output node are connected when a voltage of the output node is lower than a reference voltage, and the first current source and the output node are disconnected when a voltage of the output node is higher than the reference voltage, and a voltage generating circuit which is connected between the output node and a second reference potential, and includes a second semiconductor switching element turned on/off based on an output control signal.

    摘要翻译: 一种用于总线的输出电路,其输出节点连接到总线,包括连接到第一参考电位的第一电流源,连接在第一电流源和输出节点之间的第一半导体开关元件,用于控制 第一半导体开关元件,使得当输出节点的电压低于参考电压时,第一电流源和输出节点连接,并且当输出节点的电压较高时,第一电流源和输出节点断开 以及连接在输出节点和第二参考电位之间的电压产生电路,并且包括基于输出控制信号导通/截止的第二半导体开关元件。

    Receiving device, delay-information transmitting method in receiving device, audio output device, and delay-control method in audio output device
    9.
    发明授权
    Receiving device, delay-information transmitting method in receiving device, audio output device, and delay-control method in audio output device 有权
    音频输出装置中的接收装置,接收装置中的延迟信息发送方法,音频输出装置和延迟控制方法

    公开(公告)号:US08441576B2

    公开(公告)日:2013-05-14

    申请号:US12312388

    申请日:2007-11-07

    IPC分类号: H04N9/475

    摘要: A television receiver computes a delay time of an image displayed on the television receiver with respect to an audio signal transmitted from the television receiver to an audio amplifier, based on video delay information as EDID data, delay information transported from a disc recorder and information of a time required until audio data received from the disc recorder is transmitted to an audio amplifier. The audio amplifier controls a delay time lasting until the audio responsive to the received audio data is outputted so that the delay time matches the aforementioned delay time. Thereby, the displayed image in the television receiver and the audio output in the audio amplifier are synchronized.

    摘要翻译: 电视接收机基于作为EDID数据的视频延迟信息,从盘记录器传送的延迟信息和从盘记录器传送的信息,计算电视接收机上显示的图像相对于从电视接收机发送到音频放大器的音频信号的延迟时间 从盘记录器接收的音频数据被传送到音频放大器所需的时间。 音频放大器控制延迟时间,直到输出响应于接收到的音频数据的音频,使得延迟时间与上述延迟时间匹配。 由此,电视接收机中的显示图像和音频放大器中的音频输出被同步。

    Centralized master-slave-communication control system and method with multi-channel communication on the same line
    10.
    发明授权
    Centralized master-slave-communication control system and method with multi-channel communication on the same line 失效
    集中式主从通讯控制系统及方法在同一线路上进行多通道通讯

    公开(公告)号:US08433836B2

    公开(公告)日:2013-04-30

    申请号:US12805906

    申请日:2010-08-24

    IPC分类号: G06F13/00

    CPC分类号: H04L12/403

    摘要: Disclosed herein is a communication centralized control system including one master device; a communication bus; and a plurality of slave devices configured to be connected to the master device by the communication bus, wherein the master device and the plurality of slave devices are capable of bidirectional communication via the communication bus, and different channels are allocated to at least polling communication from the master device to the slave devices and interrupt communication from the slave devices to the master device, and communication is carried out with multiplexing on the same line.

    摘要翻译: 本文公开了一种包括一个主设备的通信集中控制系统; 通讯总线 以及多个从设备,被配置为通过通信总线连接到主设备,其中主设备和多个从设备能够经由通信总线进行双向通信,并且将不同的信道分配给至少轮询通信 主设备到从设备,并且从从设备到主设备的中断通信,并且在同一线路上进行多路复用的通信。