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15 条记录 (耗时 0.032 秒)

    Fast start charge pump for voltage regulators
    4.
    发明申请
    Fast start charge pump for voltage regulators 有权
    用于稳压器的快速启动电荷泵

    公开(公告)号：US20060202741A1

    公开(公告)日：2006-09-14

    申请号：US11080067

    申请日：2005-03-14

    申请人： Hieu Tran ,  Sang Nguyen ,  Anh Ly ,  Hung Nguyen ,  Wingfu Lau ,  Nasrin Jaffari ,  Thuan Vu ,  Vishal Sarin ,  Loc Hoang

    发明人： Hieu Tran ,  Sang Nguyen ,  Anh Ly ,  Hung Nguyen ,  Wingfu Lau ,  Nasrin Jaffari ,  Thuan Vu ,  Vishal Sarin ,  Loc Hoang

    IPC分类号： G05F1/10

    CPC分类号： H02M3/07 ,  H02M1/36 ,  H02M1/44

    摘要： A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.

    摘要翻译： 数字多电平存储器系统包括电荷泵和用于产生用于各种存储器操作的调节高电压的电压调节器。 电荷泵可以包括多个升压电路，以在快速启动期间升高电荷泵的输出。 之后，升压电路被禁止，使电荷泵产生高电压而不加速。 升压电路可以被连续地使能以升高电压。 升压电路可以是无负载的。 电压调节器可以在开环中工作，并且可以包括电阻分压器作为用于调节来自电荷泵的高电压的参考电压。 电荷泵可以包括扩频泵时钟，以减少用于电容器或电感器片上电荷泵浦的电磁推理。

    Low voltage, low power bandgap circuit
    8.
    发明授权
    Low voltage, low power bandgap circuit 有权
    低电压，低功耗带隙电路

    公开(公告)号：US09092044B2

    公开(公告)日：2015-07-28

    申请号：US13286843

    申请日：2011-11-01

    申请人： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

    发明人： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

    IPC分类号： G05F3/02 ,  G05F3/30

    CPC分类号： G05F3/30

    摘要： A bandgap voltage generating circuit for generating a bandgap voltage has an operational amplifier that has two inputs and an output. A current mirror circuit has at least two parallel current paths. Each of the current paths is controlled by the output from the operational amplifier. One of the current paths is coupled to one of the two inputs to the operational amplifier. A resistor divide circuit is connected to the other current path. The resistor divide circuit provides the bandgap voltage of the circuit.

    摘要翻译： 用于产生带隙电压的带隙电压产生电路具有具有两个输入和输出的运算放大器。 电流镜电路具有至少两个平行电流路径。 每个电流路径由运算放大器的输出控制。 电流路径之一耦合到运算放大器的两个输入之一。 电阻分压电路连接到另一个电流通路。 电阻分压电路提供电路的带隙电压。

    Non-volatile Memory Array And Method Of Using Same For Fractional Word Programming
    9.
    发明申请
    Non-volatile Memory Array And Method Of Using Same For Fractional Word Programming 有权
    非易失性存储器阵列及使用相同的分数字编程方法

    公开(公告)号：US20140104965A1

    公开(公告)日：2014-04-17

    申请号：US13652447

    申请日：2012-10-15

    申请人： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

    发明人： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

    IPC分类号： G11C7/00

    CPC分类号： G11C5/145 ,  G11C8/08 ,  G11C11/5628 ,  G11C16/08 ,  G11C16/10

    摘要： A non-volatile memory device that includes N planes of non-volatile memory cells (where N is an integer greater than 1). Each plane of non-volatile memory cells includes a plurality of memory cells configured in rows and columns. Each of the N planes includes gate lines that extend across the rows of the memory cells therein but do not extend to others of the N planes of non-volatile memory cells. A controller is configured to divide each of a plurality of words of data into N fractional-words, and program each of the N fractional-words of each word of data into a different one of the N planes of non-volatile memory cells. The controller uses a programming current and a program time period for the programming, and can be configured to vary the programming current by a factor and inversely vary the program time period by the factor.

    摘要翻译： 包括非易失性存储器单元的N个平面（其中N是大于1的整数）的非易失性存储器件。 非易失性存储单元的每个平面包括以行和列配置的多个存储器单元。 N平面中的每一个包括在其中存储单元的行延伸但不延伸到非易失性存储单元的N个平面中的其他平面的栅极线。 控制器被配置为将多个数据字中的每一个分成N个小数字，并且将每个数据字的N个分数字中的每一个分解成非易失性存储单元的N个平面中的不同的一个。 控制器使用编程电流和编程时间段进行编程，并且可以配置为通过一个因素改变编程电流，并根据因子反向改变程序时间段。

    Non-volatile memory device and a method of programming such device
    10.
    发明授权
    Non-volatile memory device and a method of programming such device 有权
    非易失性存储器件和这种器件的编程方法

    公开(公告)号：US08804429B2

    公开(公告)日：2014-08-12

    申请号：US13315213

    申请日：2011-12-08

    申请人： Hieu Van Tran ,  Hung Quoc Nguyen ,  Anh Ly ,  Thuan Vu

    发明人： Hieu Van Tran ,  Hung Quoc Nguyen ,  Anh Ly ,  Thuan Vu

    IPC分类号： G11C16/04 ,  G11C7/00

    CPC分类号： G11C16/10 ,  G11C7/00 ,  G11C7/22 ,  G11C16/26 ,  G11C16/28 ,  G11C2207/2263 ,  G11C2211/5647 ,  H01L27/11517

    摘要： A non-volatile memory device has a charge pump for providing a programming current and an array of non-volatile memory cells. Each memory cell of the array is programmed by the programming current from the charge pump. The array of non-volatile memory cells is partitioned into a plurality of units, with each unit comprising a plurality of memory cells. An indicator memory cell is associated with each unit of non-volatile memory cells. A programming circuit programs the memory cells of each unit using the programming current, when fifty percent or less of the memory cells of each unit is to be programmed, and programs the inverse of the memory cells of each unit and the indicator memory cell associated with each unit, using the programming current, when more than fifty percent of the memory cells of each unit is to be programmed.

    摘要翻译： 非易失性存储器件具有用于提供编程电流和非易失性存储器单元阵列的电荷泵。 阵列的每个存储单元都由来自电荷泵的编程电流编程。 非易失性存储器单元的阵列被分割成多个单元，每个单元包括多个存储器单元。 指示器存储单元与每单位的非易失性存储单元相关联。 编程电路使用编程电流来对每个单元的存储器单元进行编程，当每个单元的存储单元的百分之五十或更少被编程时，编程每个单元的存储器单元的反相和与 每个单元使用编程电流时，每个单元的存储单元的百分之五十以上将被编程。