公开(公告)号：US20140117350A1

公开(公告)日：2014-05-01

申请号：US14062085

申请日：2013-10-24

申请人： Junichi KOEZUKA ,  Yukinori SHIMA ,  Yasuharu HOSAKA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

发明人： Junichi KOEZUKA ,  Yukinori SHIMA ,  Yasuharu HOSAKA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

IPC分类号： H01L27/12

CPC分类号： H01L27/1225 ,  H01L27/3262

摘要： To improve the reliability of a transistor as well as to inhibit fluctuation in electric characteristics. A display device includes a pixel portion and a driver circuit portion outside the pixel portion; the pixel portion includes a pixel transistor, a first insulating film covering the pixel transistor and including an inorganic material, a second insulating film including an organic material over the first insulating film, and a third insulating film including an inorganic material over the second insulating film; and the driver circuit portion includes a driving transistor to supply a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film over the first insulating film, and further includes a region in which the third insulating film is not formed over the second insulating film or a region in which the second insulating film is not covered with the third insulating film.

摘要翻译： 提高晶体管的可靠性以及抑制电特性的波动。 显示装置包括像素部分和像素部分外部的驱动器电路部分; 像素部分包括像素晶体管，覆盖像素晶体管并且包括无机材料的第一绝缘膜，在第一绝缘膜上的包括有机材料的第二绝缘膜，以及在第二绝缘膜上的包括无机材料的第三绝缘膜 ; 并且所述驱动电路部分包括驱动晶体管，以向所述像素晶体管提供信号，所述第一绝缘膜覆盖所述驱动晶体管，并且所述第二绝缘膜在所述第一绝缘膜上方，并且还包括所述第三绝缘膜为 不形成在第二绝缘膜上或第二绝缘膜未被第三绝缘膜覆盖的区域。

公开(公告)号：US20140306218A1

公开(公告)日：2014-10-16

申请号：US14244419

申请日：2014-04-03

申请人： Junichi KOEZUKA ,  Masahiro KATAYAMA ,  Yukinori SHIMA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

发明人： Junichi KOEZUKA ,  Masahiro KATAYAMA ,  Yukinori SHIMA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

IPC分类号： H01L27/12 ,  H01L23/00

CPC分类号： H01L27/1225 ,  H01L23/3121 ,  H01L23/564 ,  H01L27/1248 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

摘要： Variation in the electrical characteristics of transistors is minimized and reliability of the transistors is improved. A display device includes a pixel portion 104 and a driver circuit portion 106 outside the pixel portion. The pixel portion includes a pixel transistor, a first insulating layer 122 which covers the pixel transistor and includes an inorganic material, a second insulating layer 124 which is over the first insulating layer and includes an organic material, and a third insulating layer 128 which is over the second insulating layer and includes an inorganic material. The driver circuit portion includes a driving transistor for supplying a signal to the pixel transistor, and the first insulating layer covering the driving transistor. The second insulating layer is not formed in the driver circuit portion.

摘要翻译： 晶体管的电特性的变化最小化，晶体管的可靠性提高。 显示装置包括像素部分104和在像素部分外的驱动器电路部分106。 像素部分包括像素晶体管，覆盖像素晶体管并包括无机材料的第一绝缘层122，在第一绝缘层之上并包括有机材料的第二绝缘层124和第三绝缘层128 并且包括无机材料。 驱动器电路部分包括用于向像素晶体管提供信号的驱动晶体管，以及覆盖驱动晶体管的第一绝缘层。 第二绝缘层不形成在驱动电路部分中。

公开(公告)号：US20140139775A1

公开(公告)日：2014-05-22

申请号：US14077390

申请日：2013-11-12

申请人： Hiroyuki MIYAKE ,  Shunpei YAMAZAKI ,  Yoshifumi TANADA ,  Manabu SATO ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI ,  Shigeyasu MORI

发明人： Hiroyuki MIYAKE ,  Shunpei YAMAZAKI ,  Yoshifumi TANADA ,  Manabu SATO ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI ,  Shigeyasu MORI

IPC分类号： G02F1/1368 ,  H01L27/12

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

公开(公告)号：US20140306220A1

公开(公告)日：2014-10-16

申请号：US14246493

申请日：2014-04-07

申请人： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masahiro TAKAHASHI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

发明人： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masahiro TAKAHASHI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

摘要： To provide a novel semiconductor device in which a reduction in channel length is controlled. The semiconductor device includes an oxide semiconductor layer having a crystal part, and a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor layer. The oxide semiconductor layer includes a channel formation region and an n-type region in contact with the source electrode layer or the drain electrode layer. The crystal orientation of the crystal part is different between the channel formation region and the n-type region.

摘要翻译： 提供控制通道长度减小的新型半导体器件。 半导体器件包括具有晶体部分的氧化物半导体层以及与氧化物半导体层接触的源电极层和漏电极层。 氧化物半导体层包括与源极电极层或漏极电极层接触的沟道形成区域和n型区域。 晶体部分的晶体取向在沟道形成区域和n型区域之间是不同的。

公开(公告)号：US20160276489A1

公开(公告)日：2016-09-22

申请号：US15168291

申请日：2016-05-31

申请人： Kenichi OKAZAKI ,  Masatoshi YOKOYAMA ,  Masayuki SAKAKURA ,  Yukinori SHIMA ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Takuya MATSUO ,  Yoshitaka YAMAMOTO

发明人： Kenichi OKAZAKI ,  Masatoshi YOKOYAMA ,  Masayuki SAKAKURA ,  Yukinori SHIMA ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Takuya MATSUO ,  Yoshitaka YAMAMOTO

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L21/02172 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78696

摘要： An object is to suppress conducting-mode failures of a transistor that uses an oxide semiconductor film and has a short channel length. A semiconductor device includes a gate electrode 304, a gate insulating film 306 formed over the gate electrode, an oxide semiconductor film 308 over the gate insulating film, and a source electrode 310a and a drain electrode 310b formed over the oxide semiconductor film. The channel length L of the oxide semiconductor film is more than or equal to 1 μm and less than or equal to 50 μm. The oxide semiconductor film has a peak at a rotation angle 2θ in the vicinity of 31° in X-ray diffraction measurement.

摘要翻译： 目的是抑制使用氧化物半导体膜并具有短沟道长度的晶体管的导通模式故障。 半导体器件包括栅电极304，形成在栅电极上的栅极绝缘膜306，栅极绝缘膜上的氧化物半导体膜308以及形成在氧化物半导体膜上的源电极310a和漏电极310b。 氧化物半导体膜的沟道长度L大于等于1μm且小于等于50μm。 氧化物半导体膜在X射线衍射测定中具有在31°附近的旋转角度2θ的峰值。

公开(公告)号：US20130270554A1

公开(公告)日：2013-10-17

申请号：US13860879

申请日：2013-04-11

申请人： Masatoshi YOKOYAMA ,  Tsutomu MURAKAWA ,  Kenichi OKAZAKI ,  Masayuki SAKAKURA ,  Takuya MATSUO ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Yoshitaka YAMAMOTO

发明人： Masatoshi YOKOYAMA ,  Tsutomu MURAKAWA ,  Kenichi OKAZAKI ,  Masayuki SAKAKURA ,  Takuya MATSUO ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Yoshitaka YAMAMOTO

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/78696

摘要： The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.

摘要翻译： 半导体导体器件包括栅电极106，氧化物半导体膜110，源极114a和漏电极114b以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面214a和与第一侧表面214a相对的漏电极的第二侧表面214b之间。 氧化物半导体膜具有与栅电极重叠的侧面，该侧面具有位于最靠近第一侧面214a的一端314a的第一区域206a和位于第一侧面214a的一端314a的第一区域206a之间的第一高电阻区域， 最靠近第二侧表面214b的一端314b。 第一高电阻区域具有波纹状的侧面等。

公开(公告)号：US20140021466A1

公开(公告)日：2014-01-23

申请号：US13937591

申请日：2013-07-09

申请人： Shunpei YAMAZAKI ,  Naoya SAKAMOTO ,  Takahiro SATO ,  Shunsuke KOSHIOKA ,  Takayuki CHO ,  Yoshitaka YAMAMOTO ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI

发明人： Shunpei YAMAZAKI ,  Naoya SAKAMOTO ,  Takahiro SATO ,  Shunsuke KOSHIOKA ,  Takayuki CHO ,  Yoshitaka YAMAMOTO ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI

IPC分类号： H01L29/786 ,  H01L29/201

CPC分类号： H01L29/7869 ,  H01L29/201

摘要： A semiconductor device includes a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film in contact with the gate insulating film and including a channel formation region which overlaps with the gate electrode; a source electrode and a drain electrode over the oxide semiconductor film; and an oxide insulating film over the oxide semiconductor film, the source electrode, and the drain electrode. The source electrode and the drain electrode each include a first metal film having an end portion at the end of the channel formation region, a second metal film over the first metal film and containing copper, and a third metal film over the second metal film. The second metal film is formed on the inner side than the end portion of the first metal film.

摘要翻译： 半导体器件包括栅电极; 栅电极上的栅极绝缘膜; 与所述栅极绝缘膜接触并且包括与所述栅电极重叠的沟道形成区域的氧化物半导体膜; 氧化物半导体膜上的源电极和漏电极; 以及氧化物半导体膜，源电极和漏电极上的氧化物绝缘膜。 源极电极和漏极电极各自包括在沟道形成区域的端部具有端部的第一金属膜，在第一金属膜上的含有铜的第二金属膜和在第二金属膜上的第三金属膜。 第二金属膜形成在比第一金属膜的端部的内侧。

公开(公告)号：US20120034765A1

公开(公告)日：2012-02-09

申请号：US13185742

申请日：2011-07-19

申请人： Hidekazu MIYAIRI ,  Takashi IENAGA ,  Masao MORIGUCHI ,  Yosuke KANZAKI

发明人： Hidekazu MIYAIRI ,  Takashi IENAGA ,  Masao MORIGUCHI ,  Yosuke KANZAKI

IPC分类号： H01L21/20

CPC分类号： H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/32105 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulating film and the microcrystalline silicon film. The microcrystalline silicon film is formed in the following manner. Over an insulating film, a microcrystalline silicon grain having a height that allows the microcrystalline silicon grain to be completely oxidized by later plasma oxidation (e.g., a height greater than 0 nm and less than or equal to 5 nm), or a microcrystalline silicon film or an amorphous silicon film having a thickness that allows the microcrystalline silicon film or the amorphous silicon film to be completely oxidized by later plasma oxidation (e.g., a thickness greater than 0 nm and less than or equal to 5 nm) is formed. Plasma treatment in an atmosphere including oxygen or plasma oxidation is performed on the microcrystalline silicon grain, the microcrystalline silicon film, or the amorphous silicon film, so that a silicon oxide grain or a silicon oxide film is formed over the insulating film. A microcrystalline silicon film is formed over the silicon oxide grain or the silicon oxide film.

摘要翻译： 本发明的目的是提供一种具有改善的绝缘膜和微晶硅膜之间的粘附性的微晶硅膜的制造方法。 以下述方式形成微晶硅膜。 在绝缘膜上，具有通过稍后的等离子体氧化（例如，高于0nm且小于或等于5nm的高度）使微晶硅晶粒完全氧化的高度的微晶硅晶粒或微晶硅膜 或具有通过稍后的等离子体氧化（例如，厚度大于0nm且小于或等于5nm）使微晶硅膜或非晶硅膜完全氧化的厚度的非晶硅膜。 在微晶硅晶粒，微晶硅膜或非晶硅膜上进行包括氧或等离子体氧化的气氛中的等离子体处理，使得在绝缘膜上形成氧化硅晶粒或氧化硅膜。 在氧化硅晶粒或氧化硅膜上形成微晶硅膜。