公开(公告)号：US06749684B1

公开(公告)日：2004-06-15

申请号：US10250181

申请日：2003-06-10

申请人： Huajie Chen ,  Dan Mocuta ,  Richard J. Murphy ,  Paul Ronsheim ,  David Rockwell

发明人： Huajie Chen ,  Dan Mocuta ,  Richard J. Murphy ,  Paul Ronsheim ,  David Rockwell

IPC分类号： C30B2504

CPC分类号： C30B29/06 ,  C30B25/02 ,  C30B29/08 ,  C30B29/52

摘要： A method is disclosed for forming an epitaxial layer on a front side of a substrate formed of a monocrystalline material, using a chemical vapor deposition system. In this method, a plurality of gettering wafers formed of a gettering material are arranged in the CVD system, such that the front side of each substrate is facing one of the gettering wafers. Impurities present in the CVD system during formation of the epitaxial layer are gettered by the gettering wafers. Alternatively, a layer of a gettering material is deposited on a back side of each of the plurality of substrates, and the substrates are arranged such that the front side of each substrate is facing the backside of another of the substrates. In another embodiment, a layer of a gettering material is deposited on an interior surface of the CVD system. Impurities removed from the CVD system during epitaxial formation include oxygen, water vapor and other oxygen-containing contaminants.

摘要翻译： 公开了一种使用化学气相沉积系统在由单晶材料形成的基板的正面上形成外延层的方法。 在该方法中，在CVD系统中配置由吸气材料形成的多个吸气晶片，使得每个基板的前侧面对吸气晶片之一。 在形成外延层期间存在于CVD系统中的杂质被吸杂晶片吸收。 或者，在多个基板的每一个的背面上沉积吸气材料层，并且将基板布置成使得每个基板的前侧面对另一个基板的背面。 在另一个实施例中，吸气材料层沉积在CVD系统的内表面上。 在外延形成期间从CVD系统中除去的杂质包括氧，水蒸气和其它含氧污染物。

公开(公告)号：US07348253B2

公开(公告)日：2008-03-25

申请号：US10855915

申请日：2004-05-27

申请人： Stephen W. Bedell ,  Huajie Chen ,  Anthony G. Domenicucci ,  Keith E. Fogel ,  Richard J. Murphy ,  Devendra K. Sadana

发明人： Stephen W. Bedell ,  Huajie Chen ,  Anthony G. Domenicucci ,  Keith E. Fogel ,  Richard J. Murphy ,  Devendra K. Sadana

IPC分类号： H01L21/84

CPC分类号： H01L21/26506 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76254 ,  H01L29/1054

摘要： A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

摘要翻译： 提供一种形成低缺陷，基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤，并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散，从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外，由于加热步骤在接近最终SiGe合金的熔点的温度下进行，所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中，加热步骤包括氧化过程，其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

公开(公告)号：US07679141B2

公开(公告)日：2010-03-16

申请号：US12027561

申请日：2008-02-07

申请人： Stephen W. Bedell ,  Huajie Chen ,  Anthony G. Domenicucci ,  Keith E. Fogel ,  Richard J. Murphy ,  Devendra K. Sadana

发明人： Stephen W. Bedell ,  Huajie Chen ,  Anthony G. Domenicucci ,  Keith E. Fogel ,  Richard J. Murphy ,  Devendra K. Sadana

IPC分类号： H01L31/392

CPC分类号： H01L21/26506 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76254 ,  H01L29/1054

摘要： A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

摘要翻译： 提供一种形成低缺陷，基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤，并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散，从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外，由于加热步骤在接近最终SiGe合金的熔点的温度下进行，所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中，加热步骤包括氧化过程，其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

公开(公告)号：US06958286B2

公开(公告)日：2005-10-25

申请号：US10751208

申请日：2004-01-02

申请人： Huajie Chen ,  Dan M. Mocuta ,  Richard J. Murphy ,  Stephan W. Bedell ,  Devendra K. Sadana

发明人： Huajie Chen ,  Dan M. Mocuta ,  Richard J. Murphy ,  Stephan W. Bedell ,  Devendra K. Sadana

IPC分类号： C30B25/02 ,  C30B29/06 ,  C30B29/52 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/306 ,  H01L21/3205 ,  H01L21/36 ,  H01L21/44

CPC分类号： H01L21/02046 ,  C30B25/02 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02052 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02661 ,  Y10S438/933

摘要： The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, the invention first performs a hydrofluoric acid etching process on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. This etching process removes most of oxide from the surface, and leaves a first amount of oxygen (typically 1×1013−1×1015/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The invention then performs a hydrogen pre-bake process which heats the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface sufficiently to remove additional oxygen from the surface and leave a second amount of oxygen, less than the first amount, on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The heating process leaves an amount of at least 5×1012/cm2 of oxygen (typically, between approximately 1×1013/cm2 and approximately 5×1013/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. By leaving a small amount of oxygen on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface, the heating processes avoid changing the roughness of the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. Then the process of epitaxially growing the epitaxial silicon-containing layer on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface is performed.

公开(公告)号：US07335820B1

公开(公告)日：2008-02-26

申请号：US11360715

申请日：2006-02-23

申请人： Kevin Threlkeld ,  Richard J. Murphy

发明人： Kevin Threlkeld ,  Richard J. Murphy

IPC分类号： A01H1/00 ,  C07K14/415 ,  C12N5/14

CPC分类号： A01H5/10

摘要： The present invention is in the field of soybean variety S06-M03256 breeding and development. The present invention particularly relates to the soybean variety S06-M03256 and its progeny, and methods of making S06-M03256.

摘要翻译： 本发明是在大豆品种S06-M03256育种与开发领域。 本发明特别涉及大豆品种S06-M03256及其后代，以及制备S06-M03256的方法。

公开(公告)号：US06916729B2

公开(公告)日：2005-07-12

申请号：US10409516

申请日：2003-04-08

申请人： Sunfei Fang ,  Keith Kwong Hon Wong ,  Paul D. Agnello ,  Christian Lavoie ,  Lawrence A. Clevenger ,  Chester T. Dziobkowski ,  Richard J. Murphy ,  Patrick W. DeHaven ,  Nivo Rovedo ,  Hsiang-Jen Huang

发明人： Sunfei Fang ,  Keith Kwong Hon Wong ,  Paul D. Agnello ,  Christian Lavoie ,  Lawrence A. Clevenger ,  Chester T. Dziobkowski ,  Richard J. Murphy ,  Patrick W. DeHaven ,  Nivo Rovedo ,  Hsiang-Jen Huang

IPC分类号： H01L21/28 ,  H01L21/283 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/336 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78

CPC分类号： H01L29/665 ,  H01L21/28052 ,  H01L21/28518

摘要： A method of forming a salicide on a semiconductor device includes depositing a first refractory metal layer over a silicon region of a substrate, depositing a near-noble metal layer over the first refractory metal layer, and depositing a second refractory metal layer over the near-noble metal layer. The semiconductor device is annealed in a first annealing process to form a silicide layer abutting the doped region of the semiconductor device. Un-reacted portions of the near-noble metal layer and the second refractory metal layer are removed. The device may be annealed in an optional second annealing process to convert the silicide layer to a low resistance phase silicide material. Junction leakage and bridging are minimized or eliminated by embodiments of the present invention, and a smoother silicided surface is achieved.

摘要翻译： 在半导体器件上形成硅化物的方法包括在衬底的硅区域上沉积第一难熔金属层，在第一耐火金属层上沉积近贵金属层，以及在第二耐火金属层的近旁沉积第二难熔金属层， 贵金属层。 半导体器件在第一退火工艺中退火以形成邻接半导体器件的掺杂区域的硅化物层。 除去近贵金属层和第二难熔金属层的未反应部分。 该器件可以在任选的第二退火工艺中进行退火，以将硅化物层转换成低电阻相位硅化物材料。 通过本发明的实施例使结漏电和桥接最小化或消除，并且实现更平滑的硅化表面。

公开(公告)号：US4938738A

公开(公告)日：1990-07-03

申请号：US354959

申请日：1989-05-22

申请人： Walter K. Fuelberth ,  Andrew Fedor, Jr. ,  Richard J. Murphy

发明人： Walter K. Fuelberth ,  Andrew Fedor, Jr. ,  Richard J. Murphy

IPC分类号： F16H3/54

CPC分类号： F16H3/54

摘要： A two-speed drive arrangement has input and output shafts operatively interconnected by a clutch and a planetary gear arrangement. The clutch us selectively movable to three positions to establish the direct drive, bypassing the planetary gear arrangement, a reduction drive through the planetary gear arrangement and a neutral condition. In both the neutral condition and the direct drive, the planetary gear arrangement is free of direct rotary influence from the input and output shafts and components thereof may remain stationary.

摘要翻译： 双速驱动装置具有通过离合器和行星齿轮装置可操作地互连的输入和输出轴。 离合器选择性地可移动到三个位置以建立直接驱动，绕行星齿轮装置，通过行星齿轮装置的减速驱动和空档状态。 在中性条件和直接驱动中，行星齿轮装置不受来自输入和输出轴的直接旋转影响，并且其部件可以保持静止。

公开(公告)号：US4659871A

公开(公告)日：1987-04-21

申请号：US879550

申请日：1986-06-24

申请人： Timothy S. Smith ,  Richard J. Murphy

发明人： Timothy S. Smith ,  Richard J. Murphy

IPC分类号： C08K9/04 ,  H01B3/30 ,  H01B3/42 ,  H01B3/44 ,  H01B7/295 ,  H01B7/02

CPC分类号： H01B3/42 ,  C08K9/04 ,  H01B3/303 ,  H01B3/441 ,  H01B7/295 ,  Y10T428/2958

摘要： Polymeric cladding for elongate substrates, preferably electrical conductors, comprises an inner layer and an outer layer, the outer layer being a cross-linked polymer composition filled with halogen-free particulate inorganic flame-retardant filler which has been treated with material which increases the elongation to break of the composition at 200.degree. C. to at least 50%. The enhanced elongation enables the cladding better to resist burning, possibly by reducing the tendency for the outer layer to split when exposed to fire. Bundles of insulated electrical wires may be wrapped in mineral tape, preferably mica tape, to provide circuit integrity cables which are significantly smaller and/or lighter than previously known.

摘要翻译： 用于细长基材，优选电导体的聚合物包层包括内层和外层，外层是填充有无卤素颗粒状无机阻燃填料的交联聚合物组合物，其已经用增加伸长率的材料处理 使组合物在200℃下断裂至至少50％。 增强的伸长率使得包层更好地抵抗燃烧，可能通过减少暴露于火中时外层分裂的倾向。 绝缘电线束可以被包裹在矿物带，优选云母带中，以提供比以前已知的更小和/或更轻的电路完整性电缆。

公开(公告)号：US4107389A

公开(公告)日：1978-08-15

申请号：US733685

申请日：1976-10-18

申请人： Richard J. Murphy

发明人： Richard J. Murphy

IPC分类号： G03G15/20 ,  B32B25/20

CPC分类号： G03G15/2057 ,  Y10T428/31663

摘要： A silicone rubber surface for fixing resinous powder images to a substrate at elevated temperatures in a xerographic reproducing apparatus is disclosed. The silicone rubber surface prevents offset of the image by supplying inherently a release material to the surface. Dispersed in the silicone rubber is a catalytic agent which in the presence of water or moisture, promotes the degradation of the silicone rubber over a period of time at elevated temperatures. The release material is the degradation product of the silicone rubber, and release is possible throughout the lifetime of the fuser surface without the external application of release materials.

摘要翻译： 公开了一种用于在静电复印设备中将树脂粉末图像在高温下固定到基底的硅橡胶表面。 硅橡胶表面通过向表面固有地提供释放材料来防止图像的偏移。 分散在硅橡胶中的是在水或水分存在下促进硅橡胶在高温下一段时间内降解的催化剂。 释放材料是硅橡胶的降解产物，并且在定影器表面的整个寿命期间都可以释放，而不需要外部施加剥离材料。

公开(公告)号：US06531411B1

公开(公告)日：2003-03-11

申请号：US10007845

申请日：2001-11-05

申请人： Anthony G. Domenicucci ,  Neena Garg ,  Kenneth J. Giewont ,  Richard J. Murphy ,  Gerd Pfeiffer ,  Gregory D. Pomarico ,  Frank J. Schmidt, Jr. ,  Terrance M. Tornatore

发明人： Anthony G. Domenicucci ,  Neena Garg ,  Kenneth J. Giewont ,  Richard J. Murphy ,  Gerd Pfeiffer ,  Gregory D. Pomarico ,  Frank J. Schmidt, Jr. ,  Terrance M. Tornatore

IPC分类号： H01L21461

CPC分类号： H01L21/76243 ,  Y10S977/721 ,  Y10S977/779 ,  Y10S977/856 ,  Y10S977/863 ,  Y10S977/881 ,  Y10S977/888 ,  Y10S977/90

摘要： A method of improving surface morphology of a semiconductor substrate when using an SOI technique comprises providing a silicon ingot positioned on a support member, orientating the silicon ingot in relation to the support member, and a cutting device, and cutting the silicon ingot along about a (100) crystal plane of the silicon ingot, preferably using a wire saw. This then provides a silicon substrate having an initial surface defining a miscut angle which is less than about 0.15 degrees from the (100) crystal plane. The method then comprises processing the silicon substrate using SIMOX processing, which includes implanting oxygen atoms in the silicon substrate to form a buried oxide layer and annealing the silicon substrate to provide a final substrate surface. Finally, the method includes accepting the final substrate surface for further processing when the final substrate surface measures between 2-20 Å RMS using an atomic force microscopy technique.

摘要翻译： 当使用SOI技术时，改进半导体衬底的表面形态的方法包括提供位于支撑构件上的硅锭，使硅锭相对于支撑构件定向，以及切割装置，并且沿着约 （100）晶锭的晶面，优选使用线锯。 这样就提供了具有限定与（100）晶面小于约0.15度的误差角的初始表面的硅衬底。 该方法然后包括使用SIMOX处理来处理硅衬底，其包括在硅衬底中注入氧原子以形成掩埋氧化物层并退火硅衬底以提供最终衬底表面。 最后，该方法包括当最终的基底表面使用原子力显微镜技术测量2-20ÅRMS时，接受最终的基底表面进行进一步的处理。