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公开(公告)号：US20090001594A1
公开(公告)日：2009-01-01
申请号：US11771091
申请日：2007-06-29
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/53295 , H01L21/7682 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method may comprise assembling a first dielectric ensemble that comprises a first dielectric layer exhibiting a first porosity, a second dielectric layer exhibiting a second porosity and a third dielectric layer exhibiting a third porosity, and fabricating a first metal line in the dielectric ensemble. A chemical may be applied on the third layer to pass through and dissolve a portion of the second layer. The third layer acts to prevent a via that is partially landed on the dielectric from exposing the air gap underneath.
摘要翻译： 一种方法可以包括组装第一介电体集合，其包括表现出第一孔隙率的第一电介质层，表现出第二孔隙率的第二电介质层和表现出第三孔隙率的第三电介质层，以及在电介质集合体中制造第一金属线。 化学品可以施加在第三层上以通过并溶解第二层的一部分。 第三层用于防止部分落在电介质上的通孔露出下方的气隙。
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2.发明授权Self-forming, self-aligned barriers for back-end interconnects and methods of making same 有权用于后端互连的自成型，自对准屏障及其制造方法公开(公告)号：US08461683B2
公开(公告)日：2013-06-11
申请号：US13078683
申请日：2011-04-01
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40 , H01L23/485
CPC分类号： H01L21/76834 , H01L21/2855 , H01L21/32053 , H01L21/76832 , H01L21/76835 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76855 , H01L21/76864 , H01L21/76867 , H01L21/76897 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L2924/0002 , Y10S438/927 , H01L2924/00
摘要： Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.
摘要翻译： 在后端金属化的层间电介质层（ILD）中形成绝缘线的工艺包括在使阻挡前体中的至少一个合金元素引起的金属屏障前体之间形成电介质势垒 ILD。 因此，介电阻挡层是自形成的自对准势垒。 热处理在使至少一种合金元素从其较高浓度的区域迁移到其较低浓度的区域的条件下进行以进一步形成电介质阻挡层。 通过该方法制造各种装置。
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3.发明申请SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND METHODS OF MAKING SAME 有权自成型，后端互连的自对准障碍及其制造方法公开(公告)号：US20120248608A1
公开(公告)日：2012-10-04
申请号：US13078683
申请日：2011-04-01
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L21/76834 , H01L21/2855 , H01L21/32053 , H01L21/76832 , H01L21/76835 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76855 , H01L21/76864 , H01L21/76867 , H01L21/76897 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L2924/0002 , Y10S438/927 , H01L2924/00
摘要： Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.
摘要翻译： 在后端金属化的层间电介质层（ILD）中形成绝缘线的工艺包括在使阻挡前体中的至少一个合金元素引起的金属屏障前体之间形成电介质势垒 ILD。 因此，介电阻挡层是自形成的自对准势垒。 热处理在使至少一种合金元素从其较高浓度的区域迁移到其较低浓度的区域的条件下进行以进一步形成电介质阻挡层。 通过该方法制造各种装置。
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公开(公告)号：US06677253B2
公开(公告)日：2004-01-13
申请号：US09972228
申请日：2001-10-05
IPC分类号： H01L2131
CPC分类号： H01L21/02126 , C23C16/401 , H01L21/02216 , H01L21/02274 , H01L21/31633
摘要： A method for carbon doped oxide (CDO) deposition is described. One method of deposition includes providing a substrate and introducing oxygen to a carbon doped oxide precursor in the presence of the substrate. A carbon doped oxide film is formed on the substrate. In another method the substrate is placed on a susceptor of a chemical vapor deposition apparatus. A background gas is introduced along with the carbon doped oxide precursor and oxygen to form the carbon doped oxide film on the substrate.
摘要翻译： 描述了碳掺杂氧化物（CDO）沉积的方法。 沉积的一种方法包括提供衬底并在衬底的存在下将氧引入掺碳的氧化物前体。 在基板上形成碳掺杂氧化物膜。 在另一种方法中，将基板放置在化学气相沉积设备的基座上。 背景气体与碳掺杂的氧化物前体和氧一起引入，以在衬底上形成碳掺杂的氧化物膜。
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5.发明申请公开(公告)号：US20080073748A1
公开(公告)日：2008-03-27
申请号：US11525709
申请日：2006-09-21
IPC分类号： H01L29/00
CPC分类号： H01L21/7682 , H01L21/76804 , H01L21/76831 , H01L21/76885 , H01L23/5222 , H01L23/5283 , H01L23/53238 , H01L23/53276 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Dielectric spacers for a plurality of metal interconnects and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers are adjacent to neighboring metal interconnects having flared profiles and are discontiguous from one another. In another embodiment, the dielectric spacers provide a region upon which un-landed vias may effectively land.
摘要翻译： 描述了用于多个金属互连的介电间隔件以及形成这种介电间隔物的方法。 在一个实施例中，介电间隔物与具有扩口轮廓的相邻金属互连件相邻并且彼此不连续。 在另一个实施例中，电介质间隔物提供了一个区域，未着陆过孔可以有效地着陆。
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6.发明申请公开(公告)号：US20180236440A1
公开(公告)日：2018-08-23
申请号：US15772839
申请日：2015-12-04
申请人： Jeffery D. BIELEFELD , James M. BLACKWELL , David J. MICHALAK , Jessica M. TORRES , Marie KRYSAK , Intel Corporation
发明人： James M. BLACKWELL , David J. Michalak , Jessica M. Torres , Marie KRYSAK , Jeffery D. Bielefeld
摘要： Catalysts for facilitating cross-linking of liquid precursors into solid dielectric materials are disclosed. Initially, catalysts are protected, either by coordination with other compounds or by conversion to an ionic salt. Protection prevents catalysts from facilitating cross-linking unless activated. A catalyst is activated upon receiving an excitation, e.g. thermal excitation by heating. Upon receiving an excitation, protection of a catalyst dissociates, decomposes, becomes neutralized, or is otherwise transformed to allow the catalyst to facilitate cross-linking of the precursors into solid dielectric materials. Methods for fabricating dielectric materials using such protected catalysts as well as devices comprising the resulting materials are also described. Dielectric materials comprising cross-linked cyclic carbosilane units having a ring structure including C and Si may be formed in this manner. Protected catalysts disclosed herein allow careful control of precursor cross-linking, resulting in higher quality dielectric materials that may be formed by coating techniques.
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公开(公告)号：US20130320520A1
公开(公告)日：2013-12-05
申请号：US13995905
申请日：2011-12-22
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L23/485 , H01L21/02203 , H01L21/02343 , H01L21/02359 , H01L21/3105 , H01L21/76814 , H01L21/76826 , H01L21/76831 , H01L2924/0002 , H01L2924/00
摘要： A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will be thermally stable; and forming a film including the molecule. An apparatus including a circuit substrate including a plurality of devices; a plurality of interconnect lines disposed in a plurality of layers coupled to the plurality of devices; and a plurality of dielectric layers disposed between the plurality of interconnect lines, wherein at least one of the dielectric layers comprises a porous material surface relative to the plurality of devices and the surface comprises a pore obstructing material.
摘要翻译： 一种包括在包括多个器件的电路基板上形成包括表面孔隙率的介电材料的方法; 用第一反应物化学改性电介质材料表面的一部分; 使表面的化学改性部分与一旦反应后将是热稳定的分子反应; 并形成包含该分子的膜。 一种装置，包括：包括多个装置的电路基板; 布置在耦合到所述多个装置的多个层中的多个互连线; 以及设置在所述多个互连线之间的多个电介质层，其中所述电介质层中的至少一个相对于所述多个器件包括多孔材料表面，并且所述表面包括孔阻塞材料。
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公开(公告)号：US09269652B2
公开(公告)日：2016-02-23
申请号：US13995905
申请日：2011-12-22
IPC分类号： H01L21/76 , H01L23/485 , H01L21/3105 , H01L21/768 , H01L21/02
CPC分类号： H01L23/485 , H01L21/02203 , H01L21/02343 , H01L21/02359 , H01L21/3105 , H01L21/76814 , H01L21/76826 , H01L21/76831 , H01L2924/0002 , H01L2924/00
摘要： A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will be thermally stable; and forming a film including the molecule. An apparatus including a circuit substrate including a plurality of devices; a plurality of interconnect lines disposed in a plurality of layers coupled to the plurality of devices; and a plurality of dielectric layers disposed between the plurality of interconnect lines, wherein at least one of the dielectric layers comprises a porous material surface relative to the plurality of devices and the surface comprises a pore obstructing material.
摘要翻译： 一种包括在包括多个器件的电路基板上形成包括表面孔隙率的介电材料的方法; 用第一反应物化学改性电介质材料表面的一部分; 使表面的化学改性部分与一旦反应后将是热稳定的分子反应; 并形成包含该分子的膜。 一种装置，包括：包括多个装置的电路基板; 布置在耦合到所述多个装置的多个层中的多个互连线; 以及设置在所述多个互连线之间的多个电介质层，其中所述电介质层中的至少一个相对于所述多个器件包括多孔材料表面，并且所述表面包括孔阻塞材料。
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9.发明授权公开(公告)号：US07772702B2
公开(公告)日：2010-08-10
申请号：US11525709
申请日：2006-09-21
CPC分类号： H01L21/7682 , H01L21/76804 , H01L21/76831 , H01L21/76885 , H01L23/5222 , H01L23/5283 , H01L23/53238 , H01L23/53276 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Dielectric spacers for a plurality of metal interconnects and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers are adjacent to neighboring metal interconnects having flared profiles and are discontiguous from one another. In another embodiment, the dielectric spacers provide a region upon which un-landed vias may effectively land.
摘要翻译： 描述了用于多个金属互连的介电间隔件以及形成这种介电间隔物的方法。 在一个实施例中，介电间隔物与具有扩口轮廓的相邻金属互连件相邻并且彼此不连续。 在另一个实施例中，电介质间隔物提供了一个区域，未着陆过孔可以有效地着陆。
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