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    Solid-State Batteries and Methods for Fabrication
    2.
    发明申请
    Solid-State Batteries and Methods for Fabrication 审中-公开
    固态电池和制造方法

    公开(公告)号：US20160204427A1

    公开(公告)日：2016-07-14

    申请号：US14992873

    申请日：2016-01-11

    申请人： IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

    发明人： Philippe Vereecken ,  Cedric Huyghebaert ,  Xubin Chen

    IPC分类号： H01M4/36 ,  H01M10/0585

    CPC分类号： H01M4/366 ,  H01M4/0471 ,  H01M4/139 ,  H01M10/0562 ,  H01M10/0585 ,  H01M2004/021 ,  H01M2300/0068

    摘要： Composite electrodes are disclosed that comprise an active electrode material and a solid electrolyte, wherein the solid electrolyte is a composite electrolyte. The composite electrolyte comprises an electrically insulating material having a plurality of pores and a solid electrolyte material covering inner surfaces of the plurality of pores. The active electrode material may comprise a plurality of active electrode material particles in electrical contact with each other, and the composite electrolyte may be located in spaces between the plurality of active electrode material particles. The present disclosure is further related to solid-state batteries comprising a stack of an anode, a solid electrolyte layer, and a cathode, wherein at least one of the anode and the cathode is a composite electrode according to the present disclosure. The present disclosure further provides methods for fabricating such composite electrodes and solid-state batteries.

    摘要翻译： 公开了包含活性电极材料和固体电解质的复合电极，其中固体电解质是复合电解质。 复合电解质包括具有多个孔的电绝缘材料和覆盖多个孔的内表面的固体电解质材料。 活性电极材料可以包括彼此电接触的多个活性电极材料颗粒，并且复合电解质可以位于多个有源电极材料颗粒之间的空间中。 本公开还涉及包括阳极，固体电解质层和阴极的堆叠的固态电池，其中阳极和阴极中的至少一个是根据本公开的复合电极。 本公开还提供了制造这种复合电极和固态电池的方法。

    METHOD FOR MEASURING THE TRAP DENSITY IN A 2-DIMENSIONAL SEMICONDUCTOR MATERIAL
    3.
    发明申请
    METHOD FOR MEASURING THE TRAP DENSITY IN A 2-DIMENSIONAL SEMICONDUCTOR MATERIAL 有权

    公开(公告)号：US20210356399A1

    公开(公告)日：2021-11-18

    申请号：US17323115

    申请日：2021-05-18

    申请人： IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

    发明人： Alessandra Leonhardt ,  Cesar Javier Lockhart De La Rosa ,  Stefan De Gendt ,  Cedric Huyghebaert ,  Steven Brems ,  Thomas Nuytten

    IPC分类号： G01N21/64 ,  G01N21/95

    摘要： A spot on a layer of a 2D semiconductor material deposited on a substrate is irradiated so as to generate excitons, so that photons are emitted from the layer. The photoluminescence spectrum is recorded for different values of the charge carrier concentration in the layer. The modulation of the charge carrier concentration may be realized by modulating the output power of the light source used to irradiate the sample. The relation is recorded between the ratio of the photoluminescence intensity of a first peak in the spectrum related to radiative recombination from indirect bandgaps to the intensity of a second peak in the spectrum related to radiative recombination from direct bandgaps, and the carrier concentration. This relation is fitted to a model of the ratio that takes into account multiple recombination mechanisms, radiative and non-radiative. From this process, the trap density within the bandgap is derived.

    STATIC RANDOM-ACCESS MEMORY DEVICE WITH THREE-LAYERED CELL DESIGN
    7.
    发明公开
    STATIC RANDOM-ACCESS MEMORY DEVICE WITH THREE-LAYERED CELL DESIGN 审中-公开

    公开(公告)号：US20230189497A1

    公开(公告)日：2023-06-15

    申请号：US18064133

    申请日：2022-12-09

    申请人： IMEC VZW

    发明人： Cedric Huyghebaert ,  Tom Schram ,  Iuliana Radu

    IPC分类号： H10B10/00 ,  G11C11/419

    CPC分类号： H10B10/125 ,  G11C11/419

    摘要： The present disclosure relates generally to static random-access memory (SRAM) devices. Specifically, the disclosure proposes a SRAM device with a three-layered SRAM cell design. The SRAM cell comprises a storage comprising four storage transistors, and comprises two access transistors to control access to the storage cell. The SRAM cell further comprises a stack of three layer structures. Two of the storage transistors are formed in a first layer structure of the stack, and two other of the storage transistors are formed in a second layer structure of the stack adjacent to the first layer structure. The two access transistors are formed in a third layer structure of the stack adjacent to the second layer structure. Each layer structure comprises a semiconductor material, the transistors in the layer structure are based on that semiconductor material, and at least two of the three layer structures comprise a different type of semiconductor material.