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公开(公告)号:US09159788B2
公开(公告)日:2015-10-13
申请号:US14144566
申请日:2013-12-31
Applicant: Industrial Technology Research Institute
Inventor: Chih-Wei Hu , Chen-Zi Liao , Hsun-Chih Liu , Rong Xuan
IPC: H01L31/0256 , H01L29/06 , H01L29/267 , H01L29/32
CPC classification number: H01L29/0688 , H01L21/02381 , H01L21/02458 , H01L21/02488 , H01L21/02505 , H01L21/0251 , H01L21/02513 , H01L21/0254 , H01L29/267 , H01L29/32
Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer, in which the buffer layer includes n sub-buffer layers where n≧2, and each of the sub-buffer layers has island structures. The nitride semiconductor layer is disposed on the buffer layer.
Abstract translation: 提供了包括硅衬底,成核层,缓冲层和氮化物半导体层的氮化物半导体结构。 成核层设置在硅衬底上。 缓冲层设置在成核层上,其中缓冲层包括n≥2的n个子缓冲层,并且每个子缓冲层具有岛结构。 氮化物半导体层设置在缓冲层上。
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公开(公告)号:US09112077B1
公开(公告)日:2015-08-18
申请号:US14263978
申请日:2014-04-28
Applicant: Industrial Technology Research Institute
Inventor: Chen-Zi Liao , Chih-Wei Hu , Hsun-Chih Liu , Yen-Hsiang Fang , Rong Xuan
CPC classification number: H01L33/04 , C30B29/403 , C30B29/406 , C30B29/68 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L33/007 , H01L33/12 , H01L33/32
Abstract: A semiconductor structure including a silicon substrate, a nucleation layer and a plurality of multi-layer sets is provided. The nucleation layer is disposed on the silicon substrate. The multi-layer sets are stacked over the nucleation layer, and each of the multi-layer sets includes a plurality of first sub-layers and a plurality of second sub-layers stacked alternately. A material of the first sub-layers and the second sub-layers includes Al-containing III-V group compound, wherein an average content of aluminum of the multi-layer sets decreases as a minimum distance between each of the multi-layer sets and the silicon substrate increases, and an aluminum content of the first sub-layers is different from an aluminum content of the second sub-layers.
Abstract translation: 提供了包括硅衬底,成核层和多个多层组的半导体结构。 成核层设置在硅衬底上。 多层组层叠在成核层上,多层组中的每一层包括交替堆叠的多个第一子层和多个第二子层。 第一子层和第二子层的材料包括含Al的III-V族化合物,其中多层组的铝的平均含量作为多层组和 硅衬底增加,并且第一子层的铝含量不同于第二子层的铝含量。
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公开(公告)号:US20150187876A1
公开(公告)日:2015-07-02
申请号:US14144566
申请日:2013-12-31
Applicant: Industrial Technology Research Institute
Inventor: Chih-Wei Hu , Chen-Zi Liao , Hsun-Chih Liu , Rong Xuan
IPC: H01L29/06 , H01L29/32 , H01L29/267
CPC classification number: H01L29/0688 , H01L21/02381 , H01L21/02458 , H01L21/02488 , H01L21/02505 , H01L21/0251 , H01L21/02513 , H01L21/0254 , H01L29/267 , H01L29/32
Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer, in which the buffer layer includes n sub-buffer layers where n≧2, and each of the sub-buffer layers has island structures. The nitride semiconductor layer is disposed on the buffer layer.
Abstract translation: 提供了包括硅衬底,成核层,缓冲层和氮化物半导体层的氮化物半导体结构。 成核层设置在硅衬底上。 缓冲层设置在成核层上,其中缓冲层包括n≥2的n个子缓冲层,并且每个子缓冲层具有岛结构。 氮化物半导体层设置在缓冲层上。
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公开(公告)号:US08779468B2
公开(公告)日:2014-07-15
申请号:US13726648
申请日:2012-12-26
Applicant: Industrial Technology Research Institute
Inventor: Yen-Hsiang Fang , Chien-Pin Lu , Chen-Zi Liao , Rong Xuan , Yi-Keng Fu , Chih-Wei Hu , Hsun-Chih Liu
IPC: H01L21/02
CPC classification number: H01L21/02381 , H01L21/02458 , H01L21/02488 , H01L21/02505 , H01L21/02513 , H01L21/0254 , H01L21/02639 , H01L21/02647 , H01L29/267
Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.
Abstract translation: 提供了包括硅衬底,成核层,不连续缺陷阻挡层,缓冲层和氮化物半导体层的氮化物半导体结构。 成核层设置在硅基板上,其中成核层具有缺陷密度d1。 成核层的一部分被不连续的缺陷阻挡层覆盖。 缓冲层设置在不连续缺陷阻挡层和未被不连续缺陷阻挡层覆盖的成核层的一部分。 氮化物半导体层设置在缓冲层上。 在氮化物半导体层和缓冲层之间的界面上方约1微米的位置处,氮化物半导体层的缺陷密度d2与成核层的缺陷密度d1的比率小于或等于约0.5。
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公开(公告)号:US09048389B2
公开(公告)日:2015-06-02
申请号:US14033527
申请日:2013-09-23
Applicant: Industrial Technology Research Institute
Inventor: Yi-Keng Fu , Chih-Wei Hu
Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, a first and second electrodes is provided. The active layer is located between the n-type and p-type semiconductor layers, and includes i quantum wells and (i+1) quantum barrier layers, each quantum well is located between any two of the quantum barrier layers, each of k quantum wells among the i quantum wells is constituted of a light emitting layer and an auxiliary layer, in which an indium concentration of the auxiliary layer is greater than an indium concentration of the light emitting layer, where i and k are natural numbers greater than or equal to 1 and k≦i. The first electrode and second electrodes are located on the n-type semiconductor layer and the p-type semiconductor layer, respectively.
Abstract translation: 提供了包括基板,p型和n型半导体层,有源层,第一和第二电极的发光二极管。 有源层位于n型和p型半导体层之间,包括i量子阱和(i + 1)量子势垒层,每个量子阱位于任何两个量子势垒层之间,每个量子阱 i量子阱中的阱由发光层和辅助层构成,其中辅助层的铟浓度大于发光层的铟浓度,其中i和k是大于或等于的自然数 到1和k≦̸ i。 第一电极和第二电极分别位于n型半导体层和p型半导体层上。
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公开(公告)号:US20140103354A1
公开(公告)日:2014-04-17
申请号:US14049209
申请日:2013-10-09
Applicant: Industrial Technology Research Institute
Inventor: Chih-Wei Hu , Chen-Zi Liao , Yen-Hsiang Fang , Rong Xuan
IPC: H01L29/205
CPC classification number: H01L29/205 , H01L21/02381 , H01L21/02433 , H01L21/02458 , H01L21/02488 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L29/2003 , H01L33/12 , H01L33/32
Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate includes a cubic silicon carbon nitride (SiCN) layer. The buffer layer is disposed on the nucleation layer. The nitride semiconductor layer is disposed on the buffer layer.
Abstract translation: 提供了包括硅衬底,成核层,缓冲层和氮化物半导体层的氮化物半导体结构。 设置在硅衬底上的成核层包括立方氮化硅(SiCN)层。 缓冲层设置在成核层上。 氮化物半导体层设置在缓冲层上。
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公开(公告)号:US20150083990A1
公开(公告)日:2015-03-26
申请号:US14033527
申请日:2013-09-23
Applicant: Industrial Technology Research Institute
Inventor: Yi-Keng Fu , Chih-Wei Hu
Abstract: A light emitting diode including a substrate, a p-type and n-type semiconductor layers, an active layer, a first and second electrodes is provided. The active layer is located between the n-type and p-type semiconductor layers, and includes i quantum wells and (i+1) quantum barrier layers, each quantum well is located between any two of the quantum barrier layers, each of k quantum wells among the i quantum wells is constituted of a light emitting layer and an auxiliary layer, in which an indium concentration of the auxiliary layer is greater than an indium concentration of the light emitting layer, where i and k are natural numbers greater than or equal to 1 and k≦i. The first electrode and second electrodes are located on the n-type semiconductor layer and the p-type semiconductor layer, respectively.
Abstract translation: 提供了包括基板,p型和n型半导体层,有源层,第一和第二电极的发光二极管。 有源层位于n型和p型半导体层之间,包括i量子阱和(i + 1)量子势垒层,每个量子阱位于任何两个量子势垒层之间,每个量子阱 i量子阱中的阱由发光层和辅助层构成,其中辅助层的铟浓度大于发光层的铟浓度,其中i和k是大于或等于的自然数 到1和k≦̸ i。 第一电极和第二电极分别位于n型半导体层和p型半导体层。
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公开(公告)号:US20140097442A1
公开(公告)日:2014-04-10
申请号:US13647389
申请日:2012-10-09
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor: Yen-Hsiang Fang , Chen-Zi Liao , Rong Xuan , Chien-Pin Lu , Yi-Keng Fu , Chih-Wei Hu , Hsun-Chih Liu
IPC: H01L33/32
CPC classification number: H01L33/12 , H01L33/025 , H01L33/32
Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a first buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The first buffer layer is disposed on the nucleation layer. The first buffer layer includes a dopant and Gallium, and an atomic radius of the dopant is larger than an atomic radius of Gallium. The first type nitride semiconductor layer is disposed over the first buffer layer. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer.
Abstract translation: 氮化物半导体器件包括硅衬底,成核层,第一缓冲层,第一氮化物半导体层,发光层和第二氮化物半导体层。 成核层设置在硅衬底上。 第一缓冲层设置在成核层上。 第一缓冲层包括掺杂剂和镓,并且掺杂剂的原子半径大于镓的原子半径。 第一种氮化物半导体层设置在第一缓冲层上。 发光层设置在第一氮化物半导体层上。 第二种氮化物半导体层设置在发光层上。
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