公开(公告)号：US09111851B2

公开(公告)日：2015-08-18

申请号：US13686935

申请日：2012-11-28

Applicant: Industrial Technology Research Institute

Inventor： Wei-Hung Kuo ,  Suh-Fang Lin ,  Rong Xuan

IPC: H01L29/15 ,  H01L29/66 ,  H01L31/06 ,  H01L21/336 ,  H01L29/20 ,  H01L29/778 ,  H01L21/28 ,  H01L29/423 ,  H01L29/43 ,  H01L29/45 ,  H01L29/10

CPC classification number: H01L29/2003 ,  H01L21/28264 ,  H01L29/1066 ,  H01L29/42316 ,  H01L29/432 ,  H01L29/452 ,  H01L29/778 ,  H01L29/7786

Abstract: Provided is an enhancement mode GaN-based transistor device including an epitaxial stacked layer disposed on a substrate; a source layer and a drain layer disposed on a surface of the epitaxial stacked layer; a p-type metal oxide layer disposed between the source layer and the drain layer; and a gate layer disposed on the p-type metal oxide layer. Besides, the p-type metal oxide layer includes a body part disposed on the surface of the epitaxial stacked layer, and a plurality of extension parts connecting the body part and extending into the epitaxial stacked layer. With such structure, the enhancement mode GaN-based transistor device can effectively suppress generation of the gate leakage current.

Abstract translation: 提供了一种增强型GaN基晶体管器件，其包括设置在衬底上的外延层叠层; 设置在所述外延层叠层的表面上的源极层和漏极层; 设置在源极层和漏极层之间的p型金属氧化物层; 以及设置在p型金属氧化物层上的栅极层。 此外，p型金属氧化物层包括设置在外延层叠层的表面上的主体部分和连接主体部分并延伸到外延层叠层中的多个延伸部分。 利用这种结构，增强型GaN基晶体管器件可以有效地抑制栅极漏电流的产生。

公开(公告)号：US20140131732A1

公开(公告)日：2014-05-15

申请号：US14080805

申请日：2013-11-15

Applicant: Industrial Technology Research Institute

Inventor： Yi-Keng Fu ,  Rong Xuan ,  Hsun-Chih Liu

IPC: H01L33/64 ,  H01L33/32

CPC classification number: H01L33/642 ,  H01L33/002 ,  H01L33/007 ,  H01L33/025 ,  H01L33/04 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/22 ,  Y10T428/24562

Abstract: A light emitting diode device may include a carrier, a p-type and n-type semiconductor layers, an active layer, a first electrode and a second electrode is provided. The carrier has a growth surface and at least one nano-patterned structure on the growth surface, in which the carrier includes a substrate and a semiconductor capping layer disposed between the substrate and the n-type semiconductor layer. The n-type semiconductor layer and the p-type semiconductor layer are located over the growth surface of the carrier. The active layer is located between the n-type and p-type semiconductor layers, in which a wavelength λ of light emitted by the active layer is 222 nm≦λ≦405 nm, and a defect density of the active layer is less than or equal to 5×1010/cm2. The first and second electrodes are respectively connected to the n-type and p-type semiconductor layers. A carrier for carrying a semiconductor layer is also provided.

Abstract translation: 发光二极管器件可以包括载体，p型和n型半导体层，有源层，第一电极和第二电极。 载体在生长表面上具有生长表面和至少一个纳米图案结构，其中载体包括衬底和设置在衬底和n型半导体层之间的半导体覆盖层。 n型半导体层和p型半导体层位于载体的生长表面上。 有源层位于n型和p型半导体层之间，其中由有源层发射的光的波长λ为222nm＆lt; lE;λ＆nlE; 405nm，并且有源层的缺陷密度小于或等于 等于5×10 10 / cm 2。 第一和第二电极分别连接到n型和p型半导体层。 还提供了用于承载半导体层的载体。

公开(公告)号：US20140097442A1

公开(公告)日：2014-04-10

申请号：US13647389

申请日：2012-10-09

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Yen-Hsiang Fang ,  Chen-Zi Liao ,  Rong Xuan ,  Chien-Pin Lu ,  Yi-Keng Fu ,  Chih-Wei Hu ,  Hsun-Chih Liu

IPC: H01L33/32

CPC classification number: H01L33/12 ,  H01L33/025 ,  H01L33/32

Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a first buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The first buffer layer is disposed on the nucleation layer. The first buffer layer includes a dopant and Gallium, and an atomic radius of the dopant is larger than an atomic radius of Gallium. The first type nitride semiconductor layer is disposed over the first buffer layer. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer.

Abstract translation: 氮化物半导体器件包括硅衬底，成核层，第一缓冲层，第一氮化物半导体层，发光层和第二氮化物半导体层。 成核层设置在硅衬底上。 第一缓冲层设置在成核层上。 第一缓冲层包括掺杂剂和镓，并且掺杂剂的原子半径大于镓的原子半径。 第一种氮化物半导体层设置在第一缓冲层上。 发光层设置在第一氮化物半导体层上。 第二种氮化物半导体层设置在发光层上。

公开(公告)号：US09159788B2

公开(公告)日：2015-10-13

申请号：US14144566

申请日：2013-12-31

Applicant: Industrial Technology Research Institute

Inventor： Chih-Wei Hu ,  Chen-Zi Liao ,  Hsun-Chih Liu ,  Rong Xuan

IPC: H01L31/0256 ,  H01L29/06 ,  H01L29/267 ,  H01L29/32

CPC classification number: H01L29/0688 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/0254 ,  H01L29/267 ,  H01L29/32

Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer, in which the buffer layer includes n sub-buffer layers where n≧2, and each of the sub-buffer layers has island structures. The nitride semiconductor layer is disposed on the buffer layer.

Abstract translation: 提供了包括硅衬底，成核层，缓冲层和氮化物半导体层的氮化物半导体结构。 成核层设置在硅衬底上。 缓冲层设置在成核层上，其中缓冲层包括n≥2的n个子缓冲层，并且每个子缓冲层具有岛结构。 氮化物半导体层设置在缓冲层上。

公开(公告)号：US09112077B1

公开(公告)日：2015-08-18

申请号：US14263978

申请日：2014-04-28

Applicant: Industrial Technology Research Institute

Inventor： Chen-Zi Liao ,  Chih-Wei Hu ,  Hsun-Chih Liu ,  Yen-Hsiang Fang ,  Rong Xuan

IPC: H01L23/52 ,  H01L29/06 ,  H01L33/00 ,  H01L21/00 ,  H01L33/04

CPC classification number: H01L33/04 ,  C30B29/403 ,  C30B29/406 ,  C30B29/68 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/12 ,  H01L33/32

Abstract: A semiconductor structure including a silicon substrate, a nucleation layer and a plurality of multi-layer sets is provided. The nucleation layer is disposed on the silicon substrate. The multi-layer sets are stacked over the nucleation layer, and each of the multi-layer sets includes a plurality of first sub-layers and a plurality of second sub-layers stacked alternately. A material of the first sub-layers and the second sub-layers includes Al-containing III-V group compound, wherein an average content of aluminum of the multi-layer sets decreases as a minimum distance between each of the multi-layer sets and the silicon substrate increases, and an aluminum content of the first sub-layers is different from an aluminum content of the second sub-layers.

Abstract translation: 提供了包括硅衬底，成核层和多个多层组的半导体结构。 成核层设置在硅衬底上。 多层组层叠在成核层上，多层组中的每一层包括交替堆叠的多个第一子层和多个第二子层。 第一子层和第二子层的材料包括含Al的III-V族化合物，其中多层组的铝的平均含量作为多层组和 硅衬底增加，并且第一子层的铝含量不同于第二子层的铝含量。

公开(公告)号：US20150187876A1

公开(公告)日：2015-07-02

申请号：US14144566

申请日：2013-12-31

Applicant: Industrial Technology Research Institute

Inventor： Chih-Wei Hu ,  Chen-Zi Liao ,  Hsun-Chih Liu ,  Rong Xuan

IPC: H01L29/06 ,  H01L29/32 ,  H01L29/267

CPC classification number: H01L29/0688 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/0254 ,  H01L29/267 ,  H01L29/32

Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer, in which the buffer layer includes n sub-buffer layers where n≧2, and each of the sub-buffer layers has island structures. The nitride semiconductor layer is disposed on the buffer layer.

Abstract translation: 提供了包括硅衬底，成核层，缓冲层和氮化物半导体层的氮化物半导体结构。 成核层设置在硅衬底上。 缓冲层设置在成核层上，其中缓冲层包括n≥2的n个子缓冲层，并且每个子缓冲层具有岛结构。 氮化物半导体层设置在缓冲层上。

公开(公告)号：US08779468B2

公开(公告)日：2014-07-15

申请号：US13726648

申请日：2012-12-26

Applicant: Industrial Technology Research Institute

Inventor： Yen-Hsiang Fang ,  Chien-Pin Lu ,  Chen-Zi Liao ,  Rong Xuan ,  Yi-Keng Fu ,  Chih-Wei Hu ,  Hsun-Chih Liu

IPC: H01L21/02

CPC classification number: H01L21/02381 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02647 ,  H01L29/267

Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.

Abstract translation: 提供了包括硅衬底，成核层，不连续缺陷阻挡层，缓冲层和氮化物半导体层的氮化物半导体结构。 成核层设置在硅基板上，其中成核层具有缺陷密度d1。 成核层的一部分被不连续的缺陷阻挡层覆盖。 缓冲层设置在不连续缺陷阻挡层和未被不连续缺陷阻挡层覆盖的成核层的一部分。 氮化物半导体层设置在缓冲层上。 在氮化物半导体层和缓冲层之间的界面上方约1微米的位置处，氮化物半导体层的缺陷密度d2与成核层的缺陷密度d1的比率小于或等于约0.5。

公开(公告)号：US09397281B2

公开(公告)日：2016-07-19

申请号：US14583780

申请日：2014-12-29

Applicant: Industrial Technology Research Institute

Inventor： Yi-Keng Fu ,  Rong Xuan ,  Hsun-Chih Liu

IPC: H01L33/00 ,  H01L33/64 ,  H01L33/04 ,  H01L33/12 ,  H01L33/22 ,  H01L33/20 ,  H01L33/02 ,  H01L33/06

CPC classification number: H01L33/642 ,  H01L33/002 ,  H01L33/007 ,  H01L33/025 ,  H01L33/04 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/22 ,  Y10T428/24562

Abstract: A carrier for carrying a semiconductor layer having a growth surface and at least one nano-patterned structure on the growth surface is provided. The at least one nano-patterned structure on the growth surface of the carrier has a plurality of mesas, a recess is formed between two adjacent mesas, in which a depth of the recess ranges from 10 nm to 500 nm, and a dimension of the mesa ranges from 10 nm to 800 nm.

Abstract translation: 提供了用于在生长表面上承载具有生长表面和至少一个纳米图案结构的半导体层的载体。 在载体的生长表面上的至少一个纳米图案结构具有多个台面，在两个相邻的台面之间形成凹部，其中凹部的深度范围为10nm至500nm， 台面范围为10nm至800nm。

公开(公告)号：US20150179880A1

公开(公告)日：2015-06-25

申请号：US14139880

申请日：2013-12-24

Applicant: Industrial Technology Research Institute

Inventor： Yen-Hsiang Fang ,  Rong Xuan ,  Chia-Lung Tsai ,  Yu-Hsiang Chang

IPC: H01L33/14 ,  H01L33/32

CPC classification number: H01L33/14 ,  H01L33/32

Abstract: A nitride light emitting diode structure including a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, a first metal pad, a second metal pad and a magnetic film is disclosed. The magnetic film disposed between the first metal pad and the first type doped semiconductor layer includes a zinc oxide (ZnO) layer doped with cobalt (Co). The content of Co in the ZnO layer ranges from 5% to 25% by molar ratio.

Abstract translation: 公开了一种包括第一掺杂半导体层，第二掺杂半导体层，发光层，第一金属焊盘，第二金属焊盘和磁性膜的氮化物发光二极管结构。 设置在第一金属焊盘和第一类型掺杂半导体层之间的磁性膜包括掺杂有钴（Co）的氧化锌（ZnO）层。 ZnO层中Co的含量为5〜25摩尔％。

公开(公告)号：US08952411B2

公开(公告)日：2015-02-10

申请号：US14080805

申请日：2013-11-15

Applicant: Industrial Technology Research Institute

Inventor： Yi-Keng Fu ,  Rong Xuan ,  Hsun-Chih Liu

IPC: H01L33/00 ,  H01L33/12 ,  H01L33/20

CPC classification number: H01L33/642 ,  H01L33/002 ,  H01L33/007 ,  H01L33/025 ,  H01L33/04 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/22 ,  Y10T428/24562

Abstract: A light emitting diode device may include a carrier, a p-type and n-type semiconductor layers, an active layer, a first electrode and a second electrode is provided. The carrier has a growth surface and at least one nano-patterned structure on the growth surface, in which the carrier includes a substrate and a semiconductor capping layer disposed between the substrate and the n-type semiconductor layer. The n-type semiconductor layer and the p-type semiconductor layer are located over the growth surface of the carrier. The active layer is located between the n-type and p-type semiconductor layers, in which a wavelength λ of light emitted by the active layer is 222 nm≦λ≦405 nm, and a defect density of the active layer is less than or equal to 5×1010/cm2. The first and second electrodes are respectively connected to the n-type and p-type semiconductor layers. A carrier for carrying a semiconductor layer is also provided.

Abstract translation: 发光二极管器件可以包括载体，p型和n型半导体层，有源层，第一电极和第二电极。 载体在生长表面上具有生长表面和至少一个纳米图案结构，其中载体包括衬底和设置在衬底和n型半导体层之间的半导体覆盖层。 n型半导体层和p型半导体层位于载体的生长表面上。 有源层位于n型和p型半导体层之间，其中由有源层发射的光的波长λ为222nm＆lt; lE;λ＆nlE; 405nm，并且有源层的缺陷密度小于或等于 等于5×10 10 / cm 2。 第一电极和第二电极分别连接到n型和p型半导体层。 还提供了用于承载半导体层的载体。