公开(公告)号：US10217695B2

公开(公告)日：2019-02-26

申请号：US15367920

申请日：2016-12-02

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Klaus Pressel ,  Maciej Wojnowski

IPC: H01L23/48 ,  H01L21/78 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/56

Abstract: An electronic device comprising a semiconductor package having a first main surface region and a second main surface region and comprising a semiconductor chip comprising at least one chip pad in the second main surface region and a connector block comprising at least one first electrically conductive through connection and at least one second electrically conductive through connection extending with different cross-sectional areas between the first main surface region and the second main surface region and being arranged side-by-side with the semiconductor chip.

公开(公告)号：US20140110840A1

公开(公告)日：2014-04-24

申请号：US13736553

申请日：2013-01-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Maciej Wojnowski ,  Walter Hartner ,  Ottmar Geitner ,  Gottfried Beer ,  Klaus Pressel ,  Mehran Pour Mousavi

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L23/49816 ,  H01L21/568 ,  H01L21/76802 ,  H01L21/76885 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17519 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/82101 ,  H01L2224/96 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01Q1/2283 ,  H01Q9/0407 ,  H01Q9/16 ,  H01Q23/00 ,  H01L2224/19 ,  H01L2924/014 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01029 ,  H01L2924/01055 ,  H01L2924/01064 ,  H01L2924/01044 ,  H01L2924/01042 ,  H01L2924/01015 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.

Abstract translation: 在本发明的一个实施例中，半导体封装包括具有第一主表面和相对的第二主表面的衬底。 芯片设置在基板中。 芯片包括在第一主表面处的多个接触垫。 第一天线结构设置在第一主表面处。 反射器设置在第二主表面处。

公开(公告)号：US08952521B2

公开(公告)日：2015-02-10

申请号：US13736553

申请日：2013-01-08

Applicant: Infineon Technologies AG

Inventor： Maciej Wojnowski ,  Walter Hartner ,  Ottmar Geitner ,  Gottfried Beer ,  Klaus Pressel ,  Mehran Pour Mousavi

IPC: H01L23/04 ,  H01L23/66 ,  H01L21/768 ,  H01L23/498 ,  H01Q1/22 ,  H01Q9/04 ,  H01Q9/16 ,  H01Q23/00 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L21/568 ,  H01L21/76802 ,  H01L21/76885 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17519 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/82101 ,  H01L2224/96 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01Q1/2283 ,  H01Q9/0407 ,  H01Q9/16 ,  H01Q23/00 ,  H01L2224/19 ,  H01L2924/014 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01029 ,  H01L2924/01055 ,  H01L2924/01064 ,  H01L2924/01044 ,  H01L2924/01042 ,  H01L2924/01015 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.

Abstract translation: 在本发明的一个实施例中，半导体封装包括具有第一主表面和相对的第二主表面的衬底。 芯片设置在基板中。 芯片包括在第一主表面处的多个接触垫。 第一天线结构设置在第一主表面处。 反射器设置在第二主表面处。

公开(公告)号：US20170162476A1

公开(公告)日：2017-06-08

申请号：US15367920

申请日：2016-12-02

Applicant: Infineon Technologies AG

Inventor： Thorsten MEYER ,  Klaus Pressel ,  Maciej Wojnowski

IPC: H01L23/48 ,  H01L23/495 ,  H01L23/31 ,  H01L21/78

CPC classification number: H01L23/481 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49541 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/18162

Abstract: An electronic device comprising a semiconductor package having a first main surface region and a second main surface region and comprising a semiconductor chip comprising at least one chip pad in the second main surface region and a connector block comprising at least one first electrically conductive through connection and at least one second electrically conductive through connection extending with different cross-sectional areas between the first main surface region and the second main surface region and being arranged side-by-side with the semiconductor chip.