公开(公告)号：US11444185B2

公开(公告)日：2022-09-13

申请号：US16661518

申请日：2019-10-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Pouya Hashemi ,  Mahmoud Khojasteh ,  Tak H. Ning ,  Alexander Reznicek

IPC: H01L29/737 ,  H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L29/205 ,  H01L21/762

Abstract: A bipolar junction transistor (LBJT) device that includes a base region of a first III-V semiconductor material having A first band gap; and emitter and collector regions present on opposing sides of the base region, wherein the emitter and collector regions are comprised of a second III-V semiconductor material having a wider band gap than the first III-V semiconductor material. A dielectric region is present underlying the base region, emitter region and the collect region. The dielectric region has an inverted apex geometry. The sidewalls of dielectric region that extend to the apex of the inverted apex geometry are present on facets of a supporting substrate III-V semiconductor material having a {110} crystalline orientation.

公开(公告)号：US20190296106A1

公开(公告)日：2019-09-26

申请号：US16436089

申请日：2019-06-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Takashi Ando ,  Pouya Hashemi ,  Mahmoud Khojasteh ,  Alexander Reznicek

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786 ,  H01L29/423 ,  H01L21/306

Abstract: A method of forming a nanosheet semiconductor device that includes epitaxially forming a stack of at least two repeating nanosheets, the at least two repeating nanosheets including a first nanosheet layer of a first III-V semiconductor material and a second nanosheet layer of a second III-V semiconductor material. A sacrificial gate structure is formed on the stack of the at least two repeating nanosheets. Source and drain regions are epitaxially formed on the second nanosheet layer. The sacrificial gate structure is removed to provide a gate opening. An etch process removes the first nanosheet layer selectively to the second nanosheet layer, wherein the etch process is selective to facets of the material for the first nanosheet layer to provide an inverted apex at the base of the stack. A dielectric layer is deposited filling the inverted apex. A functional gate structure is formed in the gate opening.

公开(公告)号：US10388727B2

公开(公告)日：2019-08-20

申请号：US15819567

申请日：2017-11-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Takashi Ando ,  Pouya Hashemi ,  Mahmoud Khojasteh ,  Alexander Reznicek

IPC: H01L27/12 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L21/306 ,  H01L29/423 ,  H01L29/786

Abstract: A method of forming a nanosheet semiconductor device that includes epitaxially forming a stack of at least two repeating nanosheets, the at least two repeating nanosheets including a first nanosheet layer of a first III-V semiconductor material and a second nanosheet layer of a second III-V semiconductor material. A sacrificial gate structure is formed on the stack of the at least two repeating nanosheets. Source and drain regions are epitaxially formed on the second nanosheet layer. The sacrificial gate structure is removed to provide a gate opening. An etch process removes the first nanosheet layer selectively to the second nanosheet layer, wherein the etch process is selective to facets of the material for the first nanosheet layer to provide an inverted apex at the base of the stack. A dielectric layer is deposited filling the inverted apex. A functional gate structure is formed in the gate opening.

公开(公告)号：US20190157386A1

公开(公告)日：2019-05-23

申请号：US15819567

申请日：2017-11-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Takashi Ando ,  Pouya Hashemi ,  Mahmoud Khojasteh ,  Alexander Reznicek

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/02 ,  H01L21/306 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/0649 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02603 ,  H01L21/30617 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/775 ,  H01L29/78618 ,  H01L29/78681 ,  H01L29/78696

Abstract: A method of forming a nanosheet semiconductor device that includes epitaxially forming a stack of at least two repeating nanosheets, the at least two repeating nanosheets including a first nanosheet layer of a first III-V semiconductor material and a second nanosheet layer of a second III-V semiconductor material. A sacrificial gate structure is formed on the stack of the at least two repeating nanosheets. Source and drain regions are epitaxially formed on the second nanosheet layer. The sacrificial gate structure is removed to provide a gate opening. An etch process removes the first nanosheet layer selectively to the second nanosheet layer, wherein the etch process is selective to facets of the material for the first nanosheet layer to provide an inverted apex at the base of the stack. A dielectric layer is deposited filling the inverted apex. A functional gate structure is formed in the gate opening.

公开(公告)号：US10276384B2

公开(公告)日：2019-04-30

申请号：US15419065

申请日：2017-01-30

Applicant: International Business Machines Corporation ,  Tokyo Electron Limited

Inventor： Robert L. Bruce ,  Kevin K. Chan ,  Sebastian U. Engelmann ,  Dario L. Goldfarb ,  Marinus Hopstaken ,  Mahmoud Khojasteh ,  George G. Totir ,  Hongwen Yan ,  Masahiro Yamazaki

IPC: H01L21/223 ,  H01L29/10 ,  H01L29/207 ,  H01L21/306

Abstract: A gas is ionized into a plasma. A compound of a dopant is mixed into the plasma, forming a mixed plasma. Using a semiconductor device fabrication system, a layer of III-V material is exposed to the mixed plasma to dope the layer with the dopant up to a depth in the layer, forming a shallow doped portion of the layer. The depth of the dopant is controlled by a second layer of the dopant formed at the shallow doped portion of the layer. The second layer is exposed to a solution, where the solution is prepared to erode the dopant in the second layer at a first rate. After an elapsed period, the solution is removed from the second layer, wherein the elapsed period is insufficient to erode a total depth of the layer and the shallow doped portion by more than a tolerance erosion amount.

公开(公告)号：US20170044470A1

公开(公告)日：2017-02-16

申请号：US15334863

申请日：2016-10-26

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  Zeon Corporation

Inventor： Robert L. Bruce ,  Sebastian U. Engelmann ,  Eric A. Joseph ,  Mahmoud Khojasteh ,  Masahiro Nakamura ,  Satyavolu S. Papa Rao ,  Bang N. To ,  George G. Totir ,  Yu Zhu

IPC: C11D7/10 ,  H01L21/02 ,  C11D11/00 ,  H01L21/3065

CPC classification number: C11D7/105 ,  C11D11/0047 ,  H01L21/0206 ,  H01L21/02071 ,  H01L21/28008 ,  H01L21/3065 ,  H01L21/31116 ,  H01L29/66575

Abstract: A method for cleaning etch residues that may include treating an etched surface with an aqueous lanthanoid solution, wherein the aqueous lanthanoid solution removes an etch residue that includes a majority of hydrocarbons and at least one element selected from the group consisting of carbon, oxygen, fluorine, nitrogen and silicon. In one example, the aqueous solution may be cerium ammonium nitrate (Ce(NH4)(NO3)),(CAN).

Abstract translation: 一种用于清洗蚀刻残留物的方法，其可以包括用含水镧系溶液处理蚀刻表面，其中所述含水镧系溶液除去包括大部分烃和至少一种选自碳，氧，氟的元素的蚀刻残渣 ，氮和硅。 在一个实例中，水溶液可以是硝酸铈铵（Ce（NH 4）（NO 3）），（CAN）。

公开(公告)号：US20150118839A1

公开(公告)日：2015-04-30

申请号：US14523515

申请日：2014-10-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  Zeon Corporation

Inventor： Robert L. Bruce ,  Sebastian U. Engelmann ,  Eric A. Joseph ,  Mahmoud Khojasteh ,  Masahiro Nakamura ,  Satyavolu S. Papa Rao ,  Bang N. To ,  George G. Totir ,  Yu Zhu

IPC: H01L21/02 ,  C11D7/10 ,  C11D11/00 ,  H01L21/28 ,  H01L21/311

CPC classification number: C11D7/105 ,  C11D11/0047 ,  H01L21/0206 ,  H01L21/02071 ,  H01L21/28008 ,  H01L21/3065 ,  H01L21/31116 ,  H01L29/66575

Abstract: A method for cleaning etch residues that may include treating an etched surface with an aqueous lanthanoid solution, wherein the aqueous lanthanoid solution removes an etch residue that includes a majority of hydrocarbons and at least one element selected from the group consisting of carbon, oxygen, fluorine, nitrogen and silicon. In one example, the aqueous solution may be cerium ammonium nitrate (Ce(NH4)(NO3)),(CAN).

Abstract translation: 一种用于清洗蚀刻残留物的方法，其可以包括用含水镧系溶液处理蚀刻表面，其中所述含水镧系溶液除去包括大部分烃和至少一种选自碳，氧，氟的元素的蚀刻残渣 ，氮和硅。 在一个实例中，水溶液可以是硝酸铈铵（Ce（NH 4）（NO 3）），（CAN）。

公开(公告)号：US20140128307A1

公开(公告)日：2014-05-08

申请号：US13669627

申请日：2012-11-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Vishal Chhabra ,  Laertis Economikos ,  John A. Fitzsimmons ,  James Hannah ,  Mahmoud Khojasteh ,  Jennifer Muncy

IPC: C11D7/60 ,  C11D10/02

CPC classification number: H01L21/02057 ,  C11D3/042 ,  C11D3/2079 ,  C11D3/2086 ,  C11D7/08 ,  C11D7/265 ,  C11D7/267 ,  C11D11/0047

Abstract: Cleaning solutions and processes for cleaning semiconductor devices or semiconductor tooling during manufacture thereof generally include contacting the semiconductor devices or semiconductor tooling with an acidic aqueous cleaning solution free of a fluorine containing compound, the acidic aqueous cleaning solution including at least one antioxidant and at least one non-oxidizing acid.

Abstract translation: 用于在制造过程中清洁半导体器件或半导体工具的清洁溶液和工艺通常包括使半导体器件或半导体工具与不含氟化合物的酸性含水清洁溶液接触，所述酸性含水清洁溶液包含至少一种抗氧化剂和至少一种抗氧化剂 非氧化性酸。

公开(公告)号：US10748990B2

公开(公告)日：2020-08-18

申请号：US16436089

申请日：2019-06-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Takashi Ando ,  Pouya Hashemi ,  Mahmoud Khojasteh ,  Alexander Reznicek

IPC: H01L27/12 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L21/306 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  B82Y10/00 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40

Abstract: A method of forming a nanosheet semiconductor device that includes epitaxially forming a stack of at least two repeating nanosheets, the at least two repeating nanosheets including a first nanosheet layer of a first III-V semiconductor material and a second nanosheet layer of a second III-V semiconductor material. A sacrificial gate structure is formed on the stack of the at least two repeating nanosheets. Source and drain regions are epitaxially formed on the second nanosheet layer. The sacrificial gate structure is removed to provide a gate opening. An etch process removes the first nanosheet layer selectively to the second nanosheet layer, wherein the etch process is selective to facets of the material for the first nanosheet layer to provide an inverted apex at the base of the stack. A dielectric layer is deposited filling the inverted apex. A functional gate structure is formed in the gate opening.

公开(公告)号：US20200058776A1

公开(公告)日：2020-02-20

申请号：US16661446

申请日：2019-10-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Pouya Hashemi ,  Mahmoud Khojasteh ,  Tak H. Ning ,  Alexander Reznicek

IPC: H01L29/737 ,  H01L29/205 ,  H01L21/306 ,  H01L29/66 ,  H01L29/06

Abstract: A bipolar junction transistor (LBJT) device that includes a base region of a first III-V semiconductor material having A first band gap; and emitter and collector regions present on opposing sides of the base region, wherein the emitter and collector regions are comprised of a second III-V semiconductor material having a wider band gap than the first III-V semiconductor material. A dielectric region is present underlying the base region, emitter region and the collect region. The dielectric region has an inverted apex geometry. The sidewalls of dielectric region that extend to the apex of the inverted apex geometry are present on facets of a supporting substrate III-V semiconductor material having a {110} crystalline orientation.