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    SEMICONDUCTOR IMAGE SENSOR MODULE, METHOD FOR MANUFACTURING THE SAME AS WELL AS CAMERA AND METHOD FOR MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR IMAGE SENSOR MODULE, METHOD FOR MANUFACTURING THE SAME AS WELL AS CAMERA AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体图像传感器模块，用于制造相机的方法以及用于制造相机的方法

    公开(公告)号：US20120261554A1

    公开(公告)日：2012-10-18

    申请号：US13442414

    申请日：2012-04-09

    申请人： Ikuo Yoshihara ,  Masamitsu Yamanaka

    发明人： Ikuo Yoshihara ,  Masamitsu Yamanaka

    IPC分类号： H01L27/00

    CPC分类号： H01L27/14634 ,  H01L27/14618 ,  H01L27/14632 ,  H01L27/1464 ,  H01L31/0203 ,  H01L31/024 ,  H01L2924/0002 ,  H04N5/2257 ,  H01L2924/00

    摘要： A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.

    摘要翻译： 半导体图像传感器模块1至少包括半导体图像传感器芯片2，半导体图像传感器芯片2在半导体基板的第一主表面上具有晶体管形成区域，并且具有光反射区域，光电转换区域形成在相对侧的第二主表面上的第二主表面上 到第一主表面上的图像信号处理芯片3和用于处理形成在半导体图像传感器芯片2中的图像信号的图像信号处理芯片3，其中在第一主表面上形成有多个凸块电极15a， 图像信号处理芯片3，芯片2和3都通过散热装置4和半导体图像传感器芯片2的多个凸块电极15a和图像信号处理芯片3上的多个凸起电极15b 电连接。

    METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
    6.
    发明申请
    METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS 有权
    固态成像装置的制造方法，固体成像装置和电子装置

    公开(公告)号：US20120146173A1

    公开(公告)日：2012-06-14

    申请号：US13308854

    申请日：2011-12-01

    申请人： Kazuo Ohta ,  Ikuo Yoshihara

    发明人： Kazuo Ohta ,  Ikuo Yoshihara

    IPC分类号： H01L31/02 ,  H01L31/0224

    CPC分类号： H01L27/14634 ,  H01L27/1266 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14687 ,  H01L27/1469

    摘要： The present disclosure provides a method of manufacturing a solid-state imaging device, including, forming on a first substrate a semiconductor thin film which is to be photoelectric conversion sections, forming driving circuits on a face side of a second substrate, laminating the first substrate and the second substrate by disposing the first substrate and second substrate opposite to each other in a condition in which the semiconductor thin film is connected to the driving circuits, and removing the first substrate from the semiconductor thin film in a condition in which the semiconductor thin film is left on the second substrate side.

    摘要翻译： 本公开内容提供了一种制造固态成像装置的方法，包括：在第一基板上形成作为光电转换部的半导体薄膜，在第二基板的正面形成驱动电路，层叠第一基板 并且在半导体薄膜连接到驱动电路的条件下，将第一基板和第二基板相对地配置，并且在半导体薄膜的条件下从半导体薄膜去除第一基板， 膜留在第二基板侧。

    Solid-state imaging device and method of manufacturing the same
    7.
    发明授权
    Solid-state imaging device and method of manufacturing the same 有权
    固态成像装置及其制造方法

    公开(公告)号：US07851838B2

    公开(公告)日：2010-12-14

    申请号：US11941583

    申请日：2007-11-16

    申请人： Ikuo Yoshihara

    发明人： Ikuo Yoshihara

    IPC分类号： H01L31/09

    CPC分类号： H01L27/1463 ,  H01L27/14612 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14687 ,  H01L27/14689 ,  H01L31/035281

    摘要： A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.

    摘要翻译： 一种具有半导体衬底的固态成像器件; 该基板中的像素形成区域包括由光电转换元件构成的像素; 以及衬底中的元件隔离部分，并且包括元件隔离绝缘层和杂质元件隔离区。 元件隔离绝缘层位于基板的表面中。 杂质元素隔离区域位于元件隔离绝缘层下方和衬底内。 杂质元素隔离区具有至少一部分宽度比元件隔离绝缘层窄的部分。 光电转换元件延伸到元件隔离部分的元件隔离绝缘层下方的位置。

    Semiconductor device and method of fabricating same
    8.
    发明授权
    Semiconductor device and method of fabricating same 失效
    半导体装置及其制造方法

    公开(公告)号：US06362037B1

    公开(公告)日：2002-03-26

    申请号：US09131350

    申请日：1998-08-10

    申请人： Ikuo Yoshihara ,  Kazuaki Kurooka

    发明人： Ikuo Yoshihara ,  Kazuaki Kurooka

    IPC分类号： H01L218238

    CPC分类号： H01L27/0623 ,  Y10S257/903 ,  Y10S257/904

    摘要： An N-type buried diffusion layer as a portion of the collector region of a bipolar transistor and an N-type buried diffusion layer of a memory cell region are simultaneously formed, and the buried diffusion layer of the memory cell region serves as a potential groove for electrons. The threshold voltage of a MOS transistor in the memory cell region is higher than the threshold voltage of a MOS transistor in a peripheral circuit region, preventing an increase in the standby current in the memory cell region. This increases the soft error resistance of the memory cell and prevents a decrease in the operating speed and an increase in the consumption power.

    摘要翻译： 同时形成作为双极晶体管的集电极区域的一部分的N型埋入扩散层和存储单元区域的N型埋入扩散层，并且存储单元区域的埋入扩散层用作电位沟槽 对于电子。 存储单元区域中的MOS晶体管的阈值电压高于外围电路区域中的MOS晶体管的阈值电压，从而防止存储单元区域中的待机电流的增加。 这增加了存储单元的软错误电阻，并且防止了运行速度的降低和消耗功率的增加。

    Parallel computer with distributed shared memories and distributed task activating circuits
    10.
    发明授权
    Parallel computer with distributed shared memories and distributed task activating circuits 失效
    具有分布式共享存储器和分布式任务激活电路的并行计算机

    公开(公告)号：US4951193A

    公开(公告)日：1990-08-21

    申请号：US85646

    申请日：1987-08-14

    申请人： Akira Muramatsu ,  Kousuke Sakoda ,  Ikuo Yoshihara ,  Kazuo Nakao ,  Makoto Nohmi ,  Naoki Hamanaka ,  Shigeo Nagashima ,  Teruo Tanaka

    发明人： Akira Muramatsu ,  Kousuke Sakoda ,  Ikuo Yoshihara ,  Kazuo Nakao ,  Makoto Nohmi ,  Naoki Hamanaka ,  Shigeo Nagashima ,  Teruo Tanaka

    IPC分类号： G06F9/45 ,  G06F9/50

    CPC分类号： G06F9/5016 ,  G06F8/451 ,  G06F2209/484

    摘要： In accessing a memory, each element processor executes a program constructed so as to designate an address belonging to a predetermined local address area for each element processor. When a memory write instruction is executed by an element processor, it is detected if the memory address designated by the instruction coincides with a predetermined address. If detected, a predetermined address belonging to a local address space of another element processor and assigned to the first-mentioned predetermined address, and the data written in response to the write instruction, are sent to the other element processor to instruct the data to be written therein as a copy data. A next task to be executed is decided independently for each element processor.

    摘要翻译： 在访问存储器时，每个元件处理器执行构造成为每个元件处理器指定属于预定本地地址区域的地址的程序。 当由元件处理器执行存储器写入指令时，检测由指令指定的存储器地址是否与预定地址一致。 如果检测到，则属于另一元件处理器的本地地址空间并分配给首先提到的预定地址的预定地址以及响应写指令写入的数据被发送到另一元件处理器以指示数据为 在其中写入作为复制数据。 对于每个元件处理器独立地确定要执行的下一个任务。