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公开(公告)号:US08963285B2
公开(公告)日:2015-02-24
申请号:US13790117
申请日:2013-03-08
Applicant: Infineon Technologies AG
Inventor: Winfried Bakalski , Anton Steltenpohl
IPC: H01L27/08 , H01L23/552 , H01L29/40 , H01L23/28 , H01L21/78 , H01L23/50 , H01L23/538 , H01L23/00
CPC classification number: H01L23/28 , H01L21/561 , H01L21/78 , H01L23/13 , H01L23/147 , H01L23/3121 , H01L23/367 , H01L23/3677 , H01L23/50 , H01L23/538 , H01L24/97 , H01L2224/16225 , H01L2224/97 , H01L2924/12042 , H01L2224/81 , H01L2924/00
Abstract: A semiconductor device includes a semiconductor substrate having a first main surface in which a recess is formed. Further, the semiconductor device includes an electrical interconnect structure which is arranged at a bottom of the recess. A semiconductor chip is located in the recess. The semiconductor chip includes a plurality of chip electrodes facing the electrical interconnect structure. Further, a plurality of electrically conducting elements is arranged in the electrical interconnect structure and electrically connected to the plurality of chip electrodes.
Abstract translation: 半导体器件包括具有形成凹部的第一主表面的半导体衬底。 此外,半导体器件包括设置在凹部的底部的电互连结构。 半导体芯片位于凹槽中。 半导体芯片包括面向电互连结构的多个芯片电极。 此外,多个导电元件布置在电互连结构中并电连接到多个芯片电极。
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公开(公告)号:US20230187298A1
公开(公告)日:2023-06-15
申请号:US18107800
申请日:2023-02-09
Applicant: Infineon Technologies AG
Inventor: Daniel Porwol , Thomas Fischer , Uwe Seidel , Anton Steltenpohl
IPC: H01L23/31
CPC classification number: H01L23/3164 , H01L23/3121 , H01L23/3135 , H01L23/3192 , H01L21/6836 , H01L2924/10335
Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.
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公开(公告)号:US20210335687A1
公开(公告)日:2021-10-28
申请号:US17237143
申请日:2021-04-22
Applicant: Infineon Technologies AG
Inventor: Daniel Porwol , Thomas Fischer , Uwe Seidel , Anton Steltenpohl
IPC: H01L23/31
Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.
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公开(公告)号:US20160329891A1
公开(公告)日:2016-11-10
申请号:US14705518
申请日:2015-05-06
Applicant: Infineon Technologies AG
Inventor: Winfried Bakalski , Anton Steltenpohl , Hans Taddiken
IPC: H03K17/687
CPC classification number: H03K17/693
Abstract: In accordance with an embodiment, a radio frequency (RF) switching circuit includes a plurality of series connected RF switch cells comprising a load path and a control node, a plurality of first gate resistors coupled between control nodes of adjacent RF switch cells, and an input resistor having a first end coupled to a control node of one of the plurality of RF switch cells and a second end configured to an output of a switch driver. Each of the plurality of series connected RF switch cells includes a switch transistor.
Abstract translation: 根据实施例,射频(RF)切换电路包括多个串联连接的RF开关单元,其包括负载路径和控制节点,耦合在相邻RF开关单元的控制节点之间的多个第一栅极电阻,以及 输入电阻器,其具有耦合到所述多个RF开关单元中的一个的控制节点的第一端,以及配置为所述开关驱动器的输出的第二端。 多个串联连接的RF开关单元中的每一个包括开关晶体管。
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公开(公告)号:US20190013806A1
公开(公告)日:2019-01-10
申请号:US15644435
申请日:2017-07-07
Applicant: Infineon Technologies AG
Inventor: Valentyn Solomko , Winfried Bakalski , Andrea Cattaneo , Bernd Schleicher , Anton Steltenpohl , Hans Taddiken , Danial Tayari
IPC: H03K17/16
CPC classification number: H03K17/162
Abstract: In accordance with an embodiment, a circuit includes an RF switch, a leakage compensation circuit having a bias port and a reference port, a replica resistor coupled between a reference node and the reference port of the leakage compensation circuit, and a bias resistor coupled between the bias port of the leakage compensation circuit and a load path of the RF switch. The leakage compensation circuit configured to mirror a current from the bias port to the reference port, and apply a voltage from the reference port to the bias port.
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公开(公告)号:US09984917B2
公开(公告)日:2018-05-29
申请号:US14283242
申请日:2014-05-21
Applicant: Infineon Technologies AG
Inventor: Christian Kuehn , Martin Bartels , Henning Feick , Dirk Offenberg , Anton Steltenpohl , Hans Taddiken , Ines Uhlig
IPC: H01L21/76 , H01L21/762 , H01L29/06 , H01L21/265
CPC classification number: H01L21/76237 , H01L21/26506 , H01L21/2652 , H01L21/26586 , H01L29/0607 , H01L29/0649
Abstract: A method for manufacturing a semiconductor device in accordance with various embodiments may include: forming an opening in a first region of a semiconductor substrate, the opening having at least one sidewall and a bottom; implanting dopant atoms into the at least one sidewall and the bottom of the opening; configuring at least a portion of a second region of the semiconductor substrate laterally adjacent to the first region as at least one of an amorphous or polycrystalline region; and forming an interconnect over at least one of the first and second regions of the semiconductor substrate.
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公开(公告)号:US20180052479A1
公开(公告)日:2018-02-22
申请号:US15679263
申请日:2017-08-17
Applicant: Infineon Technologies AG
Inventor: Winfried Bakalski , Werner Simbuerger , Anton Steltenpohl , Hans Taddiken
CPC classification number: G05F3/205 , H01L27/0629 , H01L27/0922 , H01L29/0615 , H01L29/1029 , H03G1/0023 , H03G1/0029 , H03G1/007 , H03G1/0088
Abstract: In accordance with an embodiment, an integrated circuit includes a substrate, an amplifier MOSFET, and a bias voltage terminal configured to generate a potential difference of the substrate relative to at least one load terminal of the amplifier MOSFET.
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公开(公告)号:US09742400B2
公开(公告)日:2017-08-22
申请号:US14705518
申请日:2015-05-06
Applicant: Infineon Technologies AG
Inventor: Winfried Bakalski , Anton Steltenpohl , Hans Taddiken
IPC: H03K17/693 , H03K17/687 , H03K17/16
CPC classification number: H03K17/693
Abstract: In accordance with an embodiment, a radio frequency (RF) switching circuit includes a plurality of series connected RF switch cells comprising a load path and a control node, a plurality of first gate resistors coupled between control nodes of adjacent RF switch cells, and an input resistor having a first end coupled to a control node of one of the plurality of RF switch cells and a second end configured to an output of a switch driver. Each of the plurality of series connected RF switch cells includes a switch transistor.
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公开(公告)号:US11605572B2
公开(公告)日:2023-03-14
申请号:US17237143
申请日:2021-04-22
Applicant: Infineon Technologies AG
Inventor: Daniel Porwol , Thomas Fischer , Uwe Seidel , Anton Steltenpohl
IPC: H01L23/31 , H01L21/683 , H01L23/29 , H01L23/00
Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.
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公开(公告)号:US10804354B2
公开(公告)日:2020-10-13
申请号:US15933998
申请日:2018-03-23
Applicant: Infineon Technologies AG
Inventor: Hans Taddiken , Martin Bartels , Andrea Cattaneo , Henning Feick , Christian Kuehn , Anton Steltenpohl
IPC: H01L23/66 , H01L49/02 , H01L27/06 , H01L23/522
Abstract: A radio frequency resistor element comprises a resistive polysilicon trace, an isolation component and a semiconductor substrate. The resistive polysilicon trace is located above the isolation component. The isolation component is laterally at least partially surrounded by a modified semiconductor region located above the semiconductor substrate and having a higher charge carrier recombination rate than the semiconductor substrate.
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