公开(公告)号：US20160322333A1

公开(公告)日：2016-11-03

申请号：US15137062

申请日：2016-04-25

Applicant: Infineon Technologies AG

Inventor： Edward FUERGUT ,  Martin GRUBER ,  Wolfram HABLE

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/473 ,  H01L25/00 ,  H01L23/00 ,  H01L25/07 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/473 ,  H01L24/32 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L25/074 ,  H01L25/50 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2224/023 ,  H01L2224/27464 ,  H01L2224/29082 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/40225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/84801 ,  H01L2224/85205 ,  H01L2224/85801 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/1426 ,  H01L2924/1431 ,  H01L2924/186 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19101 ,  H01L2924/401 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer; at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and a molded encapsulation formed at least partially around the at least one electronic chip, wherein the electrically conductive structured layer is directly formed on the electrically isolating material.

Abstract translation: 各种实施例提供了一种电子模块，其包括插入器，其包括形成在电隔离材料中的流体通道和导电结构化层; 至少一个电子芯片附接到所述导电层并与所述流体通道热接触; 以及至少部分地围绕所述至少一个电子芯片形成的模制封装，其中所述导电结构化层直接形成在所述电绝缘材料上。

公开(公告)号：US20160216342A1

公开(公告)日：2016-07-28

申请号：US14994170

申请日：2016-01-13

Applicant: Infineon Technologies AG

Inventor： Franz JOST ,  Holger WILLE ,  Martin GRUBER

IPC: G01R33/09 ,  H01L43/12 ,  G01R33/00

CPC classification number: G01R33/091 ,  G01R33/0052 ,  G01R33/093 ,  G06F1/00 ,  G06F2101/00 ,  H01L21/00 ,  H01L43/12

Abstract: A sensor arrangement is provided. The sensor arrangement may include at least one sensor element having a first side and a second side opposite the first side and configured for sensing a magnetic field; and an electrically conductive line, wherein a first portion of the electrically conductive line may be arranged on the first side of the at least one sensor element and a second portion of the electrically conductive line may be arranged on the second side of the at least one sensor element in such a way that if a current is flowing through the electrically conductive line, the current has a first direction in the first portion and a second direction opposite the first direction in the second portion, such that a first magnetic field formed by the current in the first portion and a second magnetic field formed by the current in the second portion may at least partly add constructively at a sensing portion of the at least one sensor element.

Abstract translation: 提供传感器装置。 传感器装置可以包括至少一个传感器元件，其具有第一侧和与第一侧相对的第二侧，并被配置用于感测磁场; 和导电线，其中所述导电线的第一部分可布置在所述至少一个传感器元件的第一侧上，并且所述导电线的第二部分可以布置在所述至少一个传感器元件的第二侧上 传感器元件，使得如果电流流过导电线，则电流在第一部分具有第一方向，在第二部分具有与第一方向相反的第二方向，使得由第一部分形成的第一磁场 第一部分中的电流和由第二部分中的电流形成的第二磁场可以至少部分地在至少一个传感器元件的感测部分附加地增加。

公开(公告)号：US20220165687A1

公开(公告)日：2022-05-26

申请号：US17502084

申请日：2021-10-15

Applicant: Infineon Technologies AG

Inventor： Thorsten MEYER ,  Thomas BEMMERL ,  Martin GRUBER ,  Martin Richard NIESSNER

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/48

Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, an encapsulant encapsulating at least part of the electronic component and at least part of the carrier and having a bottom side at a first vertical level. At least one lead is electrically coupled with the electronic component and comprising a first lead portion being encapsulated in the encapsulant and a second lead portion extending out of the encapsulant at the bottom side of the encapsulant. A functional structure at the bottom side extends up to a second vertical level different from the first vertical level.

公开(公告)号：US20220157774A1

公开(公告)日：2022-05-19

申请号：US17502163

申请日：2021-10-15

Applicant: Infineon Technologies AG

Inventor： Thorsten MEYER ,  Martin GRUBER ,  Thorsten SCHARF

IPC: H01L23/00 ,  H01L21/56

Abstract: A semiconductor package is disclosed. In one example, the package includes a non-power chip including a first electrical contact arranged at a first main surface of the non-power chip. The semiconductor package further includes a power chip comprising a second electrical contact arranged at a second main surface of the power chip. A first electrical redistribution layer coupled to the first electrical contact and a second electrical redistribution layer coupled to the second electrical contact. When measured in a first direction vertical to at least one of the first main surface or the second main surface, a maximum thickness of at least a section of the first electrical redistribution layer is smaller than a maximum thickness of the second electrical redistribution layer.

公开(公告)号：US20140327458A1

公开(公告)日：2014-11-06

申请号：US13886285

申请日：2013-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Martin GRUBER ,  Angela Kessler

IPC: G01R27/14 ,  G01R3/00

CPC classification number: G01R27/14 ,  G01R1/203 ,  G01R3/00 ,  G01R13/347 ,  G01R15/181 ,  G01R31/2648 ,  G01R31/2884 ,  H05K1/0268 ,  H05K1/167 ,  H05K3/06 ,  H05K2201/09736 ,  H05K2201/10166 ,  H05K2203/092 ,  H05K2203/171

Abstract: A method of manufacturing an electronic circuit with an integrally formed capability of providing information indicative of a value of a current flowing in the electronic circuit, wherein the method comprises forming an electrically conductive wiring structure on a substrate, configuring a first section of the wiring structure for contributing to a predefined use function of the electronic circuit, and configuring a second section of the wiring structure for providing information indicative of the value of the current flowing in the electronic circuit upon applying a stimulus signal to the second section, wherein at least a part of the configuring of the first section and the configuring of the second section is performed simultaneously.

Abstract translation: 一种制造电子电路的方法，所述电子电路具有提供表示在所述电子电路中流动的电流的值的信息的整合能力，其中所述方法包括在基板上形成导电布线结构，构成所述布线结构的第一部分 用于对所述电子电路的预定义使用功能作出贡献，以及配置所述布线结构的第二部分，用于在向所述第二部分施加刺激信号时提供指示在所述电子电路中流动的电流的值的信息，其中至少一个 同时执行部分第一部分的配置和第二部分的配置。