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公开(公告)号:US11004764B2
公开(公告)日:2021-05-11
申请号:US16519802
申请日:2019-07-23
Applicant: Infineon Technologies AG
Inventor: Juergen Hoegerl , Tao Hong , Tino Karczewski , Matthias Lassmann , Christian Schweikert
IPC: H01L21/00 , H01L23/34 , H01L23/367 , H01L23/492 , H01L23/373 , H01L23/495 , H01L23/31 , H01L21/56 , H01L23/433
Abstract: A double-sided coolable semiconductor package includes an upper electrically conductive element having an outwardly exposed metal surface, a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer arranged between the electrically conductive layers, a first electrically conductive spacer arranged between the upper electrically conductive element and the upper electrically conductive layer, a power semiconductor chip arranged between the upper electrically conductive element and the upper electrically conductive layer, a second electrically conductive spacer arranged between the upper electrically conductive element and the chip, and power terminals arranged along a first side of the package. A second power terminal is arranged between first and third power terminals. The first and third power terminals are configured to apply a first supply voltage. The second power terminal is configured to apply a second supply voltage.
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公开(公告)号:US09614065B2
公开(公告)日:2017-04-04
申请号:US14538954
申请日:2014-11-12
Applicant: Infineon Technologies AG
Inventor: Tao Hong
IPC: H01L29/76 , H01L29/739 , H01L29/66 , H01L29/78 , H01L29/40 , H01L23/538 , H01L29/06 , H01L29/423
CPC classification number: H01L29/7397 , H01L23/5386 , H01L29/0696 , H01L29/404 , H01L29/4236 , H01L29/66348 , H01L29/66659 , H01L29/7395 , H01L29/7813 , H01L2924/13055
Abstract: A power semiconductor device includes a power transistor including a plurality of transistor cells on a semiconductor die. At least some of the transistor cells are inhomogeneous by design so that the number of current filaments in the transistor cells with reduced local current density increases and fewer transient avalanche oscillations occur in the power transistor during operation.
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3.
公开(公告)号:US09202800B2
公开(公告)日:2015-12-01
申请号:US13939635
申请日:2013-07-11
Applicant: Infineon Technologies AG
Inventor: Tao Hong
CPC classification number: H01L24/89 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/83 , H01L25/072 , H01L2224/04026 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/2732 , H01L2224/27334 , H01L2224/27418 , H01L2224/29111 , H01L2224/2919 , H01L2224/29294 , H01L2224/29339 , H01L2224/32225 , H01L2224/7511 , H01L2224/75251 , H01L2224/75315 , H01L2224/7532 , H01L2224/81005 , H01L2224/81209 , H01L2224/83054 , H01L2224/83055 , H01L2224/83093 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83222 , H01L2224/83439 , H01L2224/83444 , H01L2224/8381 , H01L2224/8384 , H01L2224/83851 , H01L2924/1203 , H01L2924/1301 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , Y10T29/49117 , Y10T156/10 , H01L2924/00
Abstract: A pressure chamber has first and second housing elements and first and second chamber regions. The pressure chamber is loaded with a first part, a second part, a connecting means and a sealing means. The connecting means is arranged in the first chamber region. The loaded pressure chamber is placed into a receiving region. The first housing element is pressed against the second housing element so that the pressure chamber is clamped with the aid of a working cylinder between the working cylinder and a holding frame. In the clamped state, a second gas pressure, which is higher than a first gas pressure in the first chamber region, is generated in the second chamber region. In this way, the first part, the second part and the connecting means are pressed against one another within the pressure chamber.
Abstract translation: 压力室具有第一和第二壳体元件以及第一和第二腔室区域。 压力室装有第一部分,第二部分,连接装置和密封装置。 连接装置设置在第一室区域中。 负载的压力室被放置在接收区域中。 第一壳体元件被压靠在第二壳体元件上,使得压力室借助于在工作缸和保持框架之间的工作缸被夹紧。 在夹紧状态下,在第二室区域中产生高于第一室区域中的第一气体压力的第二气体压力。 以这种方式,第一部分,第二部分和连接装置在压力室内彼此压靠。
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公开(公告)号:US20140131766A1
公开(公告)日:2014-05-15
申请号:US13678186
申请日:2012-11-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Tao Hong
IPC: H01L29/739 , H01L29/66
CPC classification number: H01L29/7397 , H01L23/5386 , H01L29/0696 , H01L29/404 , H01L29/4236 , H01L29/66348 , H01L29/66659 , H01L29/7395 , H01L29/7813 , H01L2924/13055
Abstract: A power semiconductor device is manufactured by forming a power transistor having a plurality of transistor cells on a semiconductor die, and purposely introducing inhomogeneity into the power transistor so that the number of current filaments in the transistor cells with reduced local current density increases and fewer transient avalanche oscillations occur in the power transistor during operation.
Abstract translation: 通过在半导体管芯上形成具有多个晶体管单元的功率晶体管来制造功率半导体器件,并且有意地将不均匀性引入到功率晶体管中,使得在局部电流密度降低的晶体管单元中的电流丝的数量增加,并且更短的瞬变 操作过程中功率晶体管产生雪崩振荡。
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5.
公开(公告)号:US20200035579A1
公开(公告)日:2020-01-30
申请号:US16519802
申请日:2019-07-23
Applicant: Infineon Technologies AG
Inventor: Juergen Hoegerl , Tao Hong , Tino Karczewski , Matthias Lassmann , Christian Schweikert
IPC: H01L23/367 , H01L23/492 , H01L23/373 , H01L23/495 , H01L23/433 , H01L29/16 , H01L23/31 , H01L21/56 , H01L21/52
Abstract: A double-sided coolable semiconductor package includes an upper electrically conductive element having an outwardly exposed metal surface, a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer arranged between the electrically conductive layers, a first electrically conductive spacer arranged between the upper electrically conductive element and the upper electrically conductive layer, a power semiconductor chip arranged between the upper electrically conductive element and the upper electrically conductive layer, a second electrically conductive spacer arranged between the upper electrically conductive element and the chip, and power terminals arranged along a first side of the package. A second power terminal is arranged between first and third power terminals. The first and third power terminals are configured to apply a first supply voltage. The second power terminal is configured to apply a second supply voltage.
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公开(公告)号:US20150054026A1
公开(公告)日:2015-02-26
申请号:US14538954
申请日:2014-11-12
Applicant: Infineon Technologies AG
Inventor: Tao Hong
IPC: H01L29/739 , H01L29/06 , H01L29/423
CPC classification number: H01L29/7397 , H01L23/5386 , H01L29/0696 , H01L29/404 , H01L29/4236 , H01L29/66348 , H01L29/66659 , H01L29/7395 , H01L29/7813 , H01L2924/13055
Abstract: A power semiconductor device includes a power transistor including a plurality of transistor cells on a semiconductor die. At least some of the transistor cells are inhomogeneous by design so that the number of current filaments in the transistor cells with reduced local current density increases and fewer transient avalanche oscillations occur in the power transistor during operation.
Abstract translation: 功率半导体器件包括在半导体管芯上包括多个晶体管单元的功率晶体管。 至少一些晶体管单元的设计不均匀,使得晶体管单元中具有降低的局部电流密度的电流丝数量增加,并且在操作期间在功率晶体管中发生较少的瞬态雪崩振荡。
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7.
公开(公告)号:US20230054812A1
公开(公告)日:2023-02-23
申请号:US17875929
申请日:2022-07-28
Applicant: Infineon Technologies AG
Inventor: Ajay Poonjal Pai , Tao Hong , Adrian Lis , Oliver Markus Kreiter , Matthias Rose
Abstract: A power semiconductor module includes: first and second substrates; at least one power semiconductor die arranged between and thermally coupled to a first side of each substrate, and electrically coupled to the first side of the first substrate; at least one rivet having a first end arranged on and electrically coupled to the first side of the first substrate; and an encapsulant encapsulating the at least one power semiconductor die, the at least one rivet and the substrates. At least parts of a second side of the substrates are exposed from the encapsulant. A second end of the at least one rivet is exposed at the encapsulant and configured to accept a press fit pin such that the at least one power semiconductor die can be electrically contacted from the outside.
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8.
公开(公告)号:US20140013595A1
公开(公告)日:2014-01-16
申请号:US13939635
申请日:2013-07-11
Applicant: Infineon Technologies AG
Inventor: Tao Hong
IPC: H01L23/00
CPC classification number: H01L24/89 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/83 , H01L25/072 , H01L2224/04026 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/2732 , H01L2224/27334 , H01L2224/27418 , H01L2224/29111 , H01L2224/2919 , H01L2224/29294 , H01L2224/29339 , H01L2224/32225 , H01L2224/7511 , H01L2224/75251 , H01L2224/75315 , H01L2224/7532 , H01L2224/81005 , H01L2224/81209 , H01L2224/83054 , H01L2224/83055 , H01L2224/83093 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83222 , H01L2224/83439 , H01L2224/83444 , H01L2224/8381 , H01L2224/8384 , H01L2224/83851 , H01L2924/1203 , H01L2924/1301 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , Y10T29/49117 , Y10T156/10 , H01L2924/00
Abstract: A pressure chamber has first and second housing elements and first and second chamber regions. The pressure chamber is loaded with a first part, a second part, a connecting means and a sealing means. The connecting means is arranged in the first chamber region. The loaded pressure chamber is placed into a receiving region. The first housing element is pressed against the second housing element so that the pressure chamber is clamped with the aid of a working cylinder between the working cylinder and a holding frame. In the clamped state, a second gas pressure, which is higher than a first gas pressure in the first chamber region, is generated in the second chamber region. In this way, the first part, the second part and the connecting means are pressed against one another within the pressure chamber.
Abstract translation: 压力室具有第一和第二壳体元件以及第一和第二腔室区域。 压力室装有第一部分,第二部分,连接装置和密封装置。 连接装置设置在第一室区域中。 负载的压力室被放置在接收区域中。 第一壳体元件被压靠在第二壳体元件上,使得压力室借助于在工作缸和保持框架之间的工作缸被夹紧。 在夹紧状态下,在第二室区域中产生高于第一室区域中的第一气体压力的第二气体压力。 以这种方式,第一部分,第二部分和连接装置在压力室内彼此压靠。
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