公开(公告)号：US20230021853A1

公开(公告)日：2023-01-26

申请号：US17866777

申请日：2022-07-18

申请人： Infineon Technologies AG

发明人： Frank Pueschner ,  Peter Stampka ,  Jens Pohl ,  Uwe Wagner ,  Thomas Spoettl

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  B42D25/305

摘要： A method for producing a document structure, wherein the method includes producing a chip structure by forming a cavity in a carrier having a top side and an under side, picking up a chip having at least one chip contact and a redistribution layer (RDL) connected to the at least one chip contact by means of a picking-up device detaching the chip from an auxiliary carrier, wherein the chip bears on the auxiliary carrier by way of the RDL, wherein the chip is lifted up from the auxiliary carrier by means of pressure being exerted on the RDL, wherein the lifted-up chip is picked up and inserted into the cavity, and wherein the RDL is oriented on the top side of the carrier, fixing the chip in the cavity by means of an adhesive, electrically conductively connecting the at least one chip contact of the RDL to an electrically conductive region of the carrier by means of an electrically conductive material, and embedding the carrier between a first paper layer and a second paper layer.

公开(公告)号：US20240105669A1

公开(公告)日：2024-03-28

申请号：US18471441

申请日：2023-09-21

申请人： Infineon Technologies AG

发明人： Jens Pohl ,  Uwe Wagner ,  Kristof Bothe ,  Andreas Kohl

IPC分类号： H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L24/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/45 ,  H01L24/49 ,  H01L24/85 ,  B42D25/29 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/93 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05584 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/2919 ,  H01L2224/32237 ,  H01L2224/45012 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4801 ,  H01L2224/4805 ,  H01L2224/48101 ,  H01L2224/48229 ,  H01L2224/484 ,  H01L2224/49111 ,  H01L2224/49176 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/85947 ,  H01L2224/92247 ,  H01L2924/0665

摘要： A chip assembly having a carrier having a cavity and at least one carrier contact, a chip arranged in the cavity and having at least one chip contact, and a wirebond wire, which electrically conductively connects the at least one chip contact to the at least one carrier contact, wherein the wirebond wire is flat-pressed in at least one subregion.

公开(公告)号：US20130082112A1

公开(公告)日：2013-04-04

申请号：US13631929

申请日：2012-09-29

申请人： INFINEON TECHNOLOGIES AG

发明人： Frank Pueschner ,  Kristof Bothe ,  Juergen Hoegerl ,  Andreas Karl ,  Andreas Mueller-Hipper ,  Peter Scherl ,  Peter Stampka ,  Uwe Wagner

IPC分类号： G06K19/077 ,  B32B37/12

CPC分类号： G06K19/07747

摘要： The present invention describes a smart card module for a smart card, comprising a first laminate layer, a chip having electric contacts, a first conductive layer, wherein the electrical contacts of the chip are connected to the conductive layer and the first conductive layer is arranged between the chip and the first laminate layer, and wherein the smart card module furthermore comprises an adhesive means, wherein the adhesive means is arranged between the chip and the first conductive layer and/or the first laminate layer.

摘要翻译： 本发明描述了一种用于智能卡的智能卡模块，包括第一层压层，具有电触点的芯片，第一导电层，其中芯片的电触点连接到导电层，第一导电层被布置 在所述芯片和所述第一层压层之间，并且其中所述智能卡模块还包括粘合剂装置，其中所述粘合剂装置布置在所述芯片和所述第一导电层和/或所述第一层压层之间。

公开(公告)号：US20230298989A1

公开(公告)日：2023-09-21

申请号：US18182476

申请日：2023-03-13

申请人： Infineon Technologies AG

发明人： Jens Pohl ,  Frank Püschner ,  Thomas Spöttl ,  Uwe Wagner

IPC分类号： H01L23/498 ,  H01L23/485 ,  H01L21/56 ,  H01L23/66 ,  G06K19/077

CPC分类号： H01L23/49855 ,  H01L23/485 ,  H01L21/56 ,  H01L23/66 ,  G06K19/07722 ,  H01L2223/6677

摘要： A chip-interconnect arrangement including a substrate having a cavity, a chip having at least one chip contact and one chip contact surface, the chip being arranged in the cavity, an interconnect having an interconnect surface, the interconnect being applied on a surface of the substrate, and an electrically conductive adhesion medium, which electrically connects the at least one chip contact to the interconnect, wherein the interconnect surface is planar.

公开(公告)号：US09141902B2

公开(公告)日：2015-09-22

申请号：US13631929

申请日：2012-09-29

申请人： Infineon Technologies AG

发明人： Frank Pueschner ,  Kristof Bothe ,  Juergen Hoegerl ,  Andreas Karl ,  Andreas Mueller-Hipper ,  Peter Scherl ,  Peter Stampka ,  Uwe Wagner

IPC分类号： G06K19/02 ,  G06K19/077

CPC分类号： G06K19/07747

摘要： A smart card module for a smart card, comprising a chip having electrical contacts at a front side; a first laminate layer, wherein a rear side of the chip is connected to the first laminate layer, the rear side of the chip opposite the front side; a second laminate layer; a first conductive layer, wherein the electrical contacts of the chip are connected to the first conductive layer and the first conductive layer is arranged between the chip and the second laminate layer; and an adhesive material arranged between the chip and the conductive layer and/or the second laminate layer.

摘要翻译： 一种用于智能卡的智能卡模块，包括：在前侧具有电触点的芯片; 第一层叠层，其中所述芯片的后侧连接到所述第一层压层，所述芯片的与所述前侧相对的后侧; 第二层压层; 第一导电层，其中所述芯片的电触点连接到所述第一导电层，并且所述第一导电层布置在所述芯片和所述第二层压层之间; 以及布置在所述芯片和所述导电层和/或所述第二层压层之间的粘合剂材料。