公开(公告)号：US20240363567A1

公开(公告)日：2024-10-31

申请号：US18140465

申请日：2023-04-27

Applicant: Intel Corporation

Inventor： Bernd WAIDHAS ,  Thomas WAGNER ,  Georg SEIDEMANN ,  Harald GOSSNER ,  Telesphor KAMGAING ,  Shuhei YAMADA ,  Tae Young YANG

IPC: H01L23/00 ,  H01Q1/22 ,  H01Q1/38

CPC classification number: H01L24/08 ,  H01L24/05 ,  H01Q1/2283 ,  H01Q1/38 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/05647 ,  H01L2224/08265 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32265 ,  H01L2924/0665

Abstract: Embodiments disclosed herein include a die module. In an embodiment, the die module comprises a die with a first surface and a second surface. In an embodiment, a first pad is on the second surface of the die, where a top surface of the first pad is substantially coplanar with the second surface. In an embodiment, the die module comprises an antenna module with a third surface and a fourth surface. In an embodiment, a second pad is on the third surface of the antenna module, where a bottom surface of the second pad is substantially coplanar with the third surface. In an embodiment, the top surface of the first pad directly contacts the bottom surface of the second pad.

公开(公告)号：US20230197537A1

公开(公告)日：2023-06-22

申请号：US17644801

申请日：2021-12-17

Applicant: Intel Corporation

Inventor： Richard GEIGER ,  Klaus HEROLD ,  Harald GOSSNER ,  Martin OSTERMAYR ,  Georgios PANAGOPOULOS ,  Johannes RAUH ,  Joachim SINGER ,  Thomas WAGNER

IPC: H01L21/66 ,  H01L23/48

CPC classification number: H01L22/32 ,  H01L23/481

Abstract: A semiconductor structure is provided. The semiconductor structure includes a plurality of transistors arranged at a front side of a semiconductor substrate and a test structure located at the front side of the semiconductor substrate. Further, the semiconductor structure comprises a first electrically conductive connection extending from the test structure through the semiconductor substrate to a backside test pad arranged at a backside of the semiconductor substrate.

公开(公告)号：US20250007145A1

公开(公告)日：2025-01-02

申请号：US18216315

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Peter BAUMGARTNER ,  Richard GEIGER ,  Georgios C. DOGIAMIS ,  Steven CALLENDER ,  Telesphor KAMGAING ,  Jonathan C. JENSEN ,  Harald GOSSNER

IPC: H01Q1/22 ,  H01L25/10 ,  H01Q21/24

Abstract: Embodiments disclosed herein include communication dies for mm-wave and/or sub-terahertz wavelength communications. In an embodiment, a communications die comprises a substrate with a first face and a second face. In an embodiment, edge surfaces connect the first face to the second face. In an embodiment, a circuitry element is on the first face, and an antenna on at least one of the edge surfaces.

公开(公告)号：US20240364023A1

公开(公告)日：2024-10-31

申请号：US18140346

申请日：2023-04-27

Applicant: Intel Corporation

Inventor： Thomas WAGNER ,  Georg SEIDEMANN ,  Tae Young YANG ,  Harald GOSSNER ,  Telesphor KAMGAING ,  Bernd WAIDHAS

IPC: H01Q21/20 ,  H01Q5/35

CPC classification number: H01Q21/205 ,  H01Q5/35

Abstract: Embodiments disclosed herein include a communication module. In an embodiment, the communication module comprises a package substrate, and a die on the package substrate. In an embodiment, a plurality of antennas are around the die. In an embodiment, the plurality of antennas are coupled to the die by a plurality of traces, and heights of each of the plurality of antennas is greater than a thickness of the traces.

公开(公告)号：US20230197644A1

公开(公告)日：2023-06-22

申请号：US17644803

申请日：2021-12-17

Applicant: Intel Corporation

Inventor： Wolfgang MOLZER ,  Harald GOSSNER ,  Georg SEIDEMANN ,  Bernd WAIDHAS ,  Michael LANGENBUCH

IPC: H01L23/64 ,  H01L23/498 ,  H01L23/60 ,  H01L21/48

CPC classification number: H01L23/645 ,  H01L23/49822 ,  H01L23/60 ,  H01L21/4857 ,  H01L21/4803

Abstract: A semiconductor package comprises a semiconductor die and a wiring structure, which is electrically connected to the semiconductor die. Further, the semiconductor package comprises a magnetic material. The magnetic material embeds and/or encircles a portion of the wiring structure.

公开(公告)号：US20240364000A1

公开(公告)日：2024-10-31

申请号：US18140361

申请日：2023-04-27

Applicant: Intel Corporation

Inventor： Bernd WAIDHAS ,  Thomas WAGNER ,  Georg SEIDEMANN ,  Harald GOSSNER ,  Telesphor KAMGAING ,  Shuhei YAMADA ,  Tae Young YANG

IPC: H01Q1/42 ,  H01Q1/22 ,  H01Q9/04

CPC classification number: H01Q1/422 ,  H01Q1/2283 ,  H01Q9/0407

Abstract: Embodiments disclosed herein include a die module. In an embodiment, the die module comprises a die with a first surface and a second surface. In an embodiment, a first pad is on the second surface of the die, and a dielectric layer is over the second surface of the die and the first pad. In an embodiment, an antenna module is over the dielectric layer, where the antenna module comprises a second pad that is aligned over the first pad.