公开(公告)号：US20250112140A1

公开(公告)日：2025-04-03

申请号：US18374609

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Rahul BHURE ,  Mitchell PAGE ,  Joseph PEOPLES ,  Jieying KONG ,  Nicholas S. HAEHN ,  Astitva TRIPATHI ,  Bainye Francoise ANGOUA ,  Yosef KORNBLUTH ,  Daniel ROSALES-YEOMANS ,  Joshua STACEY ,  Aaditya Anand CANDADAI ,  Yonggang Yong LI ,  Tchefor NDUKUM ,  Scott COATNEY ,  Gang DUAN ,  Jesse JONES ,  Srinivas Venkata Ramanuja PIETAMBARAM ,  Dilan SENEVIRATNE ,  Matthew ANDERSON

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/15

Abstract: Embodiments disclosed herein include package substrates with a glass core. In an embodiment, an apparatus comprises a core with a first width, and the core comprises a glass layer. In an embodiment, a via is provided through a thickness of the core, where the via is electrically conductive. In an embodiment, a first layer is provided over the core, where the first layer comprises a second width that is smaller than the first width. In an embodiment, a second layer is provided under the core, where the second layer comprises a third width that is smaller than the first width.

公开(公告)号：US20240153857A1

公开(公告)日：2024-05-09

申请号：US17983230

申请日：2022-11-08

Applicant: Intel Corporation

Inventor： Bainye Francoise ANGOUA ,  Whitney BRYKS ,  Yosef KORNBLUTH ,  Daniel ROSALES-YEOMANS ,  Holly CLINGAN ,  Patrick QUACH ,  Jade Sharee LEWIS ,  Aaditya Anand CANDADAI

IPC: H01L23/498 ,  H01L23/15 ,  H01L23/544

CPC classification number: H01L23/49827 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/16 ,  H01L2223/54426 ,  H01L2224/16225

Abstract: Embodiments disclose a package substrate. In an embodiment, the package substrate comprises a core, where the core comprises: a first sub-core, where the first sub-core comprises a glass and a first through glass via (TGV), and a second sub-core, where the second sub-core comprises the glass and a second TGV. In an embodiment, the first TGV directly contacts the second TGV.

公开(公告)号：US20240123561A1

公开(公告)日：2024-04-18

申请号：US17966021

申请日：2022-10-14

Applicant: Intel Corporation

Inventor： Yosef KORNBLUTH ,  Whitney BRYKS ,  Ravindranadh Tagore ELURI

IPC: B24B1/00 ,  B24B37/04 ,  B24B57/02

CPC classification number: B24B1/005 ,  B24B37/042 ,  B24B57/02

Abstract: This disclosure describes systems, methods, and devices related to enhanced plate polishing. A device may place a liquid between a plate and a wafer. The device may utilize a controller to vary a current flowing through an array of coils. The device may apply pressure on the plate to press against the liquid and the wafer.

公开(公告)号：US20240203664A1

公开(公告)日：2024-06-20

申请号：US18081362

申请日：2022-12-14

Applicant: Intel Corporation

Inventor： Yosef KORNBLUTH ,  Bainye Francoise ANGOUA ,  Whitney BRYKS ,  Daniel ROSALES-YEOMANS ,  Aaditya Anand CANDADAI ,  Holly CLINGAN ,  Jade Sharee LEWIS ,  Patrick QUACH ,  Srinivas V. PIETAMBARAM

IPC: H01G4/33 ,  H01G4/10

CPC classification number: H01G4/33 ,  H01G4/105

Abstract: Embodiments disclosed herein include a core for a package substrate. In an embodiment, the core comprises a first substrate with a first surface and a second surface, a first recess into the first surface of the first substrate, a first layer in the first recess, where the first layer is electrically conductive, a second layer over the first layer, where the second layer is a dielectric layer, and a third layer over the second layer, where the third layer is electrically conductive. In an embodiment, the core further comprises a second substrate with a third surface and a fourth surface, where the third surface of the second substrate faces the first surface of the first substrate, a second recess in the third surface of the second substrate, and a fourth layer in the second recess, where the fourth layer is electrically conductive, and the fourth layer contacts the third layer.

公开(公告)号：US20240092074A1

公开(公告)日：2024-03-21

申请号：US17949276

申请日：2022-09-21

Applicant: Intel Corporation

Inventor： Joshua STACEY ,  Yosef KORNBLUTH ,  Whitney BRYKS

IPC: B32B41/00 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  H01L21/48

CPC classification number: B32B41/00 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  H01L21/4846 ,  B32B2309/022 ,  B32B2309/105 ,  B32B2309/12 ,  B32B2309/72 ,  B32B2457/00

Abstract: The present disclosure is directed to a position-controlled lamination tool or press that includes an array or plurality of pressure sensors and an array or plurality of heating/cooling elements or components, which may be coupled together, for preventing or reducing laminating film or material bleed out and improving thickness variation performance. The pressure sensors may provide a controller, which is coupled to the lamination tool, with real-time feedback on any thickness variations across a substrate panel and the controller may adjust the temperature output of the heating and cooling elements to locally modify the viscosity of the laminating material in one or more regions of the substrate panel to either decrease or increase the flowability of the laminating material.

公开(公告)号：US20240177907A1

公开(公告)日：2024-05-30

申请号：US18059992

申请日：2022-11-30

Applicant: Intel Corporation

Inventor： Yosef KORNBLUTH ,  Whitney BRYKS ,  Ravindranadh ELURI ,  Aaditya Anand CANDADAI ,  Srinivas PIETAMBARAM

IPC: H01F7/20 ,  B32B3/18

CPC classification number: H01F7/206 ,  B32B3/18 ,  B32B15/18

Abstract: The present disclosure is directed to a carrier chuck having a base plate with a top surface, a plurality of first magnets positioned in a first region of the top surface, the plurality of first magnets configured to produce a first electromagnetic field to retain or suspend a panel placed on the carrier chuck during panel processing, wherein the first region corresponds to a region of the panel which comprises a magnetic material.

公开(公告)号：US20240096678A1

公开(公告)日：2024-03-21

申请号：US17949258

申请日：2022-09-21

Applicant: Intel Corporation

Inventor： Deniz TURAN ,  Yosef KORNBLUTH ,  Yonggang LI

IPC: H01L21/683 ,  H01L21/677

CPC classification number: H01L21/6833 ,  H01L21/67781

Abstract: The present disclosure is directed to a carrier chuck having a base plate with a top surface, at least one electrode positioned in a first carrier region of the top surface and configured to produce an electrostatic force to retain a panel placed on the carrier chuck during panel processing, and a dielectric layer positioned over the at least one electrode. The at least one electrode extends from the top surface by a height of at least 20 um.