公开(公告)号：US20240136281A1

公开(公告)日：2024-04-25

申请号：US17969773

申请日：2022-10-19

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Reinaldo Vega ,  Nicholas Anthony Lanzillo ,  Takashi Ando ,  David Wolpert ,  Albert M. Chu ,  Albert M. Young

IPC分类号： H01L23/528 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/528 ,  H01L21/32139 ,  H01L21/76892 ,  H01L23/5226

摘要： A semiconductor structure is presented including a first level of interconnect wiring separated into a first interconnect wiring segment and a second interconnect wiring segment, the first interconnect wiring segment defining a first line segment and the second interconnect wiring segment defining a second line segment and a second level interconnect wiring positioned orthogonally to the first level of interconnect wiring. A distalmost end of the first line segment and a distalmost end of the second line segment are separated by a spacing less than or equal to a spacing of the second level interconnect wiring defining a zero track skip.

公开(公告)号：US20230402519A1

公开(公告)日：2023-12-14

申请号：US17806292

申请日：2022-06-10

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Brent A. Anderson ,  Ruilong Xie ,  Albert M. Young ,  Albert M. Chu

IPC分类号： H01L29/423 ,  H01L27/06 ,  H01L21/822 ,  H01L21/8234

CPC分类号： H01L29/42392 ,  H01L27/0688 ,  H01L21/8221 ,  H01L21/823475 ,  H01L29/0665

摘要： A semiconductor device is provided. The semiconductor device includes a bottom field effect transistor (FET) including a bottom source-drain epitaxial layer formed on sides of the bottom FET; a top FET stacked over the bottom FET; a back-end-of-line (BEOL) layer formed on the top FET; a bottom gate contact formed in contact with the bottom FET and having an extending portion of the bottom gate contact that extends laterally over the bottom source-drain epitaxial layer; and a top gate contact formed in contact with the extending portion of the bottom gate contact and electrically connecting the bottom gate contact to the BEOL layer.

公开(公告)号：US20230387007A1

公开(公告)日：2023-11-30

申请号：US17664887

申请日：2022-05-25

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Ruilong Xie ,  Albert M. Young ,  Brent A. Anderson ,  Julien Frougier ,  Kangguo Cheng ,  CHANRO PARK

IPC分类号： H01L23/528 ,  H01L29/06 ,  H01L29/786

CPC分类号： H01L23/5283 ,  H01L29/0665 ,  H01L29/78618 ,  H01L29/78696

摘要： A microelectronic structure including a stacked device region, where stacked device region is comprised of a plurality of top devices and a plurality of bottom devices. Each of the plurality of top devices includes at least one top source/drain. Each of the plurality of bottom devices includes at least one bottom source/drain. A gate cut region located adjacent to the stacked region and an interconnect located in the gate cut region. The interconnect is connected to at least two different devices located in the stacked device region.

公开(公告)号：US20230027780A1

公开(公告)日：2023-01-26

申请号：US17381462

申请日：2021-07-21

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Tsung-Sheng Kang ,  Ardasheir Rahman ,  Tao Li ,  Albert M. Young

IPC分类号： H01L27/11 ,  H01L27/092 ,  H01L23/528 ,  H01L29/78

摘要： A memory device includes a first field effect transistor (FET) stack on a first bottom source/drain region, which includes a first vertical transport field effect transistor (VTFET) device between a second VTFET device and the first source/drain region, and a second FET stack on a second bottom source/drain region, which includes a third VTFET device between a fourth VTFET device and the bottom source/drain region. The memory device includes a third FET stack on a third bottom source/drain region, which includes a fifth VTFET between a sixth VTFET and the third source/drain region, which is laterally adjacent to the first and second source/drain regions. The memory device includes a first electrical connection interconnecting a gate structure of the third VTFET with a gate structure of the fifth VTFET, and a second electrical connection interconnecting a gate structure of the second VTFET with a gate structure of the sixth VTFET.

公开(公告)号：US20240162229A1

公开(公告)日：2024-05-16

申请号：US18054194

申请日：2022-11-10

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Ruilong Xie ,  Chen Zhang ,  Albert M. Young ,  Brent A. Anderson ,  Kisik Choi ,  Junli Wang

IPC分类号： H01L27/092 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/48 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L27/0924 ,  H01L21/76831 ,  H01L21/823807 ,  H01L21/823814 ,  H01L23/481 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

摘要： A microelectronic structure including a first stacked FET device that includes a first bottom FET device and a first upper FET device. The first bottom FET device include a plurality of first bottom channel layers, and the first upper FET device includes a plurality of first upper channel layers. A bottom gate that surrounds the plurality of first bottom channel layers and an upper gate that surrounds the plurality of first upper channel layers. A gate protrusion that extends downwards from the backside of the upper gate to connected to the bottom gate. The gate protrusion partially overlaps with a bottom gate cut region of the first bottom stacked FET device, and the gate protrusion partially overlaps with an upper gate cut region of the first upper stacked FET device.

公开(公告)号：US20230420367A1

公开(公告)日：2023-12-28

申请号：US17808568

申请日：2022-06-24

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Ruilong Xie ,  Kisik Choi ,  Su Chen Fan ,  Albert M. Young

IPC分类号： H01L23/528 ,  H01L21/822 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L27/092

CPC分类号： H01L23/5286 ,  H01L21/8221 ,  H01L21/76898 ,  H01L21/76897 ,  H01L23/481 ,  H01L25/0657 ,  H01L27/092 ,  H01L2225/06541

摘要： A semiconductor device is provided. The semiconductor device includes a first field effect transistor (FET); a second FET stacked over the bottom FET; a backside contact (BSCA) connected to a backside power rail (BSPR); and a via to backside power rail (VBPR), the VBPR landing over the BSCA.

公开(公告)号：US20230335585A1

公开(公告)日：2023-10-19

申请号：US17722376

申请日：2022-04-17

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Ruilong Xie ,  Albert M. Chu ,  Albert M. Young ,  Anthony I. Chou ,  Junli Wang ,  Brent A. Anderson

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/786 ,  H01L21/8234 ,  H01L25/07 ,  H01L23/528

CPC分类号： H01L29/0665 ,  H01L29/66545 ,  H01L29/78696 ,  H01L21/823412 ,  H01L29/66742 ,  H01L25/074 ,  H01L23/5283

摘要： A semiconductor device including a first pair of stacked transistors having a first upper transistor and a first lower transistor, a second pair of stacked transistors comprising a second upper transistor and a second lower transistor, and a first cross-connection between the first upper transistor and the second lower transistor.

公开(公告)号：US20230317611A1

公开(公告)日：2023-10-05

申请号：US17657378

申请日：2022-03-31

申请人： International Business Machines Corporation

发明人： Albert M Chu ,  Junli Wang ,  Albert M. Young ,  Dechao Guo

IPC分类号： H01L23/528 ,  H01L27/092 ,  H01L21/8238

CPC分类号： H01L23/5286 ,  H01L27/0922 ,  H01L21/823878 ,  H01L21/823871

摘要： Embodiments are disclosed for a system. The system includes multiple tracks. Further, one track includes a power rail for a first voltage. The system also includes a first via, disposed beneath, and in electrical contact with, the power rail. The system additionally includes a first contact, beneath, and in electrical contact with, the first via. The system further includes a first field effect transistor (FET), beneath, and in electrical isolation with, the first contact. Additionally, the system includes a second FET, beneath, and in electrical contact with, the first FET. Further, the system includes a second contact, beneath, and in electrical contact with, the second FET. Also, the system includes a second via, beneath, and in electrical contact with, the second contact. The system additionally includes a buried power rail (BPR), beneath, and in electrical contact with, the second via, wherein the BPR comprises a second voltage.

公开(公告)号：US20230207553A1

公开(公告)日：2023-06-29

申请号：US17562331

申请日：2021-12-27

申请人： International Business Machines Corporation

发明人： Ruilong Xie ,  Kisik Choi ,  Somnath Ghosh ,  Sagarika Mukesh ,  Albert Chu ,  Albert M. Young ,  Balasubramanian S. Pranatharthiharan ,  Huiming Bu ,  Kai Zhao ,  John Christopher Arnold ,  Brent A. Anderson ,  Dechao Guo

IPC分类号： H01L27/02 ,  H01L29/423 ,  H01L29/06 ,  H01L27/092 ,  H01L27/12 ,  H01L21/8234 ,  H01L21/762

CPC分类号： H01L27/0207 ,  H01L29/42392 ,  H01L29/0673 ,  H01L27/092 ,  H01L27/1251 ,  H01L21/823475 ,  H01L21/76229

摘要： A device comprises a first interconnect structure, a second interconnect structure, a first cell comprising a first transistor, a second cell comprising a second transistor, a first contact connecting a source/drain element of the first transistor to the first interconnect structure, and second contact connecting a source/drain element of the second transistor to the second interconnect structure. The first cell is disposed adjacent to the second cell with the first transistor disposed adjacent to the second transistor. The first and second cells are disposed between the first and second interconnect structures.

公开(公告)号：US20230178619A1

公开(公告)日：2023-06-08

申请号：US17541894

申请日：2021-12-03

申请人： International Business Machines Corporation

发明人： Albert Chu ,  Junli Wang ,  Albert M. Young ,  Vidhi Zalani ,  Dechao Guo

IPC分类号： H01L29/423 ,  H01L27/088 ,  H01L29/786 ,  H01L21/8234 ,  H01L29/06

CPC分类号： H01L29/42392 ,  H01L21/823412 ,  H01L27/088 ,  H01L29/0665 ,  H01L29/78696

摘要： A semiconductor structure includes a first transistor device comprising a plurality of channel regions. The semiconductor structure further includes a second transistor device comprising a plurality of channel regions. The first transistor device and the second transistor device are disposed in a stacked configuration. The plurality of channel regions of the first transistor device are disposed in a staggered configuration relative to the plurality of channel regions of the second transistor device.