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公开(公告)号：US20160035875A1
公开(公告)日：2016-02-04
申请号：US14883913
申请日：2015-10-15
IPC分类号： H01L29/78 , H01L29/06 , H01L29/08 , H01L29/417
CPC分类号： H01L29/66795 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02274 , H01L21/26533 , H01L21/26566 , H01L21/26586 , H01L21/31111 , H01L21/762 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/845 , H01L29/0653 , H01L29/0847 , H01L29/41783 , H01L29/41791 , H01L29/7848 , H01L29/785
摘要： After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process.
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2.发明授权Selective dielectric spacer deposition for exposing sidewalls of a finFET 有权用于暴露finFET侧壁的选择性电介质间隔物沉积公开(公告)号：US09111962B1
公开(公告)日：2015-08-18
申请号：US14220299
申请日：2014-03-20
IPC分类号： H01L21/336 , H01L21/263 , H01L29/66 , H01L21/02 , H01L29/78 , H01L21/316 , H01L21/318 , H01L21/314
CPC分类号： H01L29/4983 , H01L21/02266 , H01L21/02639 , H01L21/263 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/76224 , H01L29/41783 , H01L29/66545 , H01L29/66795 , H01L29/66803 , H01L29/785 , H01L29/7851
摘要： Angled directional ion beams are directed to sidewalls of a gate structure that straddles at least one semiconductor fin. The directions of the angled directional ion beams are contained within a vertical plane that is parallel to the sidewalls of the at least one semiconductor. A pair of gate spacers are formed on sidewalls of the gate structure by accumulation of the deposited dielectric material from the angled directional ion beams and without use of an anisotropic etch, while the sidewalls of the semiconductor fins parallel to the directional ion beams remain physically exposed. A selective epitaxy process can be performed to form raised active regions by growing a semiconductor material from the sidewalls of the semiconductor fins.
摘要翻译： 倾斜的定向离子束被引导到跨越至少一个半导体鳍片的栅极结构的侧壁。 成角度的定向离子束的方向包含在平行于至少一个半导体的侧壁的垂直平面内。 通过从成角度的定向离子束堆积沉积的介电材料并且不使用各向异性蚀刻，在栅极结构的侧壁上形成一对栅极间隔物，而平行于定向离子束的半导体鳍片的侧壁保持物理暴露 。 通过从半导体鳍片的侧壁生长半导体材料，可以进行选择性外延工艺以形成凸起的有源区。
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公开(公告)号：US10262996B2
公开(公告)日：2019-04-16
申请号：US15495526
申请日：2017-04-24
IPC分类号： H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/84 , H01L27/12 , H01L21/28 , H01L21/8234 , H01L23/535 , H01L29/06 , H01L29/49 , H01L29/66
摘要： A third type of metal gate stack is provided above an isolation structure and between a replacement metal gate n-type field effect transistor and a replacement metal gate p-type field effect transistor. The third type of metal gate stack includes at least three different components. Notably, the third type of metal gate stack includes, as a first component, an n-type workfunction metal layer, as a second component, a p-type workfunction metal layer, and as a third component, a low resistance metal layer. In some embodiments, the uppermost surface of the first, second and third components of the third type of metal gate stack are all substantially coplanar with each other. In other embodiments, an uppermost surface of the third component of the third type of metal gate stack is non-substantially coplanar with an uppermost surface of both the first and second components of the third type of metal gate stack.
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公开(公告)号：US09601380B2
公开(公告)日：2017-03-21
申请号：US14883913
申请日：2015-10-15
IPC分类号： H01L29/06 , H01L21/8234 , H01L29/78 , H01L29/66 , H01L21/02 , H01L21/265 , H01L21/311 , H01L21/762 , H01L29/08 , H01L29/417 , H01L21/84
CPC分类号： H01L29/66795 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02274 , H01L21/26533 , H01L21/26566 , H01L21/26586 , H01L21/31111 , H01L21/762 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/845 , H01L29/0653 , H01L29/0847 , H01L29/41783 , H01L29/41791 , H01L29/7848 , H01L29/785
摘要： After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process.
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公开(公告)号：US09331166B2
公开(公告)日：2016-05-03
申请号：US14519549
申请日：2014-10-21
IPC分类号： H01L29/78 , H01L27/088 , H01L29/49 , H01L29/66 , H01L21/02 , H01L21/316 , H01L21/318 , H01L21/263 , H01L21/314 , H01L29/417 , H01L21/336
CPC分类号： H01L29/4983 , H01L21/02266 , H01L21/02639 , H01L21/263 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/76224 , H01L29/41783 , H01L29/66545 , H01L29/66795 , H01L29/66803 , H01L29/785 , H01L29/7851
摘要： Angled directional ion beams are directed to sidewalls of a gate structure that straddles at least one semiconductor fin. The directions of the angled directional ion beams are contained within a vertical plane that is parallel to the sidewalls of the at least one semiconductor. A pair of gate spacers are formed on sidewalls of the gate structure by accumulation of the deposited dielectric material from the angled directional ion beams and without use of an anisotropic etch, while the sidewalls of the semiconductor fins parallel to the directional ion beams remain physically exposed. A selective epitaxy process can be performed to form raised active regions by growing a semiconductor material from the sidewalls of the semiconductor fins.
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公开(公告)号：US08629510B2
公开(公告)日：2014-01-14
申请号：US13767088
申请日：2013-02-14
发明人： Emre Alptekin , Sameer H. Jain , Reinaldo A. Vega
CPC分类号： H01L21/32053 , H01L21/28518 , H01L29/66477 , H01L29/6653 , H01L29/6659 , H01L29/66628 , H01L29/7834
摘要： One embodiment of the present invention comprises a transistor having a source/drain region within a substrate, an extension region within the substrate adjoining the source/drain region and extending toward a gate on the substrate, and a dielectric spacer against the gate wherein the dielectric spacer covers at least part of the extension region. A silicide intermix layer is formed over both the source/drain region and a portion of the extension region. A silicide contact is formed through the silicide intermix layer over the source/drain region.
摘要翻译： 本发明的一个实施例包括晶体管，其在衬底内具有源极/漏极区域，衬底内的与源极/漏极区域相邻并延伸到衬底上的栅极的延伸区域以及抵靠栅极的电介质间隔物，其中电介质 间隔物覆盖延伸区域的至少一部分。 在源极/漏极区域和延伸区域的一部分上形成硅化物混合层。 通过源极/漏极区域上的硅化物混合层形成硅化物接触。
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公开(公告)号：US20130153974A1
公开(公告)日：2013-06-20
申请号：US13767088
申请日：2013-02-14
发明人： Emre Alptekin , Sameer H. Jain , Reinaldo A. Vega
IPC分类号： H01L29/66
CPC分类号： H01L21/32053 , H01L21/28518 , H01L29/66477 , H01L29/6653 , H01L29/6659 , H01L29/66628 , H01L29/7834
摘要： One embodiment of the present invention comprises a transistor having a source/drain region within a substrate, an extension region within the substrate adjoining the source/drain region and extending toward a gate on the substrate, and a dielectric spacer against the gate wherein the dielectric spacer covers at least part of the extension region. A silicide intermix layer is formed over both the source/drain region and a portion of the extension region. A silicide contact is formed through the silicide intermix layer over the source/drain region.
摘要翻译： 本发明的一个实施例包括晶体管，其在衬底内具有源极/漏极区域，衬底内的与源极/漏极区域相邻并延伸到衬底上的栅极的延伸区域以及抵靠栅极的电介质间隔物，其中电介质 间隔物覆盖延伸区域的至少一部分。 在源极/漏极区域和延伸区域的一部分上形成硅化物混合层。 通过源极/漏极区域上的硅化物混合层形成硅化物接触。
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公开(公告)号：US09391175B2
公开(公告)日：2016-07-12
申请号：US14883882
申请日：2015-10-15
IPC分类号： H01L21/336 , H01L29/66 , H01L29/78 , H01L21/02 , H01L21/265 , H01L21/311 , H01L21/762 , H01L29/06 , H01L29/08 , H01L29/417
CPC分类号： H01L29/66795 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02274 , H01L21/26533 , H01L21/26566 , H01L21/26586 , H01L21/31111 , H01L21/762 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/845 , H01L29/0653 , H01L29/0847 , H01L29/41783 , H01L29/41791 , H01L29/7848 , H01L29/785
摘要： After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process.
摘要翻译： 在半导体散热片上形成栅极结构之后，在形成凸起的有源区之前，使用定向离子束在半导体鳍片的端壁上形成与半导体鳍片的长度方向垂直的绝缘材料部分。 方向离子束的角度选择为包括半导体鳍片的长度方向的垂直平面，从而避免在半导体鳍片的纵向侧壁上形成电介质材料部分。 执行半导体材料的选择性外延以从半导体鳍片的侧壁表面生长凸起的有源区域。 可选地，可以在选择性外延工艺之前去除电介质材料部分的水平部分。 此外，可以在选择性外延工艺之后任选地去除电介质材料部分。
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公开(公告)号：US09349836B2
公开(公告)日：2016-05-24
申请号：US14154206
申请日：2014-01-14
IPC分类号： H01L29/06 , H01L29/66 , H01L29/78 , H01L21/02 , H01L21/265 , H01L21/311 , H01L21/762 , H01L29/08 , H01L29/417
CPC分类号： H01L29/66795 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02274 , H01L21/26533 , H01L21/26566 , H01L21/26586 , H01L21/31111 , H01L21/762 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/845 , H01L29/0653 , H01L29/0847 , H01L29/41783 , H01L29/41791 , H01L29/7848 , H01L29/785
摘要： After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process.
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公开(公告)号：US20160035864A1
公开(公告)日：2016-02-04
申请号：US14883882
申请日：2015-10-15
IPC分类号： H01L29/66 , H01L21/762 , H01L21/265 , H01L21/02 , H01L21/311
CPC分类号： H01L29/66795 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02274 , H01L21/26533 , H01L21/26566 , H01L21/26586 , H01L21/31111 , H01L21/762 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/845 , H01L29/0653 , H01L29/0847 , H01L29/41783 , H01L29/41791 , H01L29/7848 , H01L29/785
摘要： After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process.
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