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31 条记录 (耗时 0.054 秒)

    Module construction for semiconductor chip
    1.
    发明授权
    Module construction for semiconductor chip 失效
    半导体芯片的模块结构

    公开(公告)号：US4603345A

    公开(公告)日：1986-07-29

    申请号：US590651

    申请日：1984-03-19

    申请人： James C. K. Lee ,  Gene M. Amdahl ,  Carlton G. Amdahl ,  Robert J. Beall ,  Anthony Matouk ,  John W. Sliwa ,  Andrzej Kucharek

    发明人： James C. K. Lee ,  Gene M. Amdahl ,  Carlton G. Amdahl ,  Robert J. Beall ,  Anthony Matouk ,  John W. Sliwa ,  Andrzej Kucharek

    IPC分类号： H01L23/34 ,  H01L23/473 ,  H01L23/50 ,  H01L23/46

    CPC分类号： H01L23/473 ,  H01L23/50 ,  H01L2924/0002

    摘要： A module for a semiconductor chip is disclosed. The module includes a heat sink with a flat surface to which the back face of the semiconductor chip is directly bonded. The exposed face of the chip has an array of power, ground and signal contacts. A plurality of alternating power and ground bus bars span the exposed face of the chip. A multilayer ceramic is located on the other side of the bus bar array and has a surface proximate the power and ground bus bars with an array of contacts which correspond to at least the signal contacts on the chip. Power leads connect the power bus bars to adjacent power contacts on the chip; ground leads connect the ground bus bars to adjacent ground contacts on the chip; and signal leads pass between adjacent power and ground bus bars and interconnect the signal contacts on the chip with the corresponding signal contacts on the ceramic. A plurality of connectors emanate from the ceramic and are electrically coupled by vias or traces through the ceramic to the signal contacts for the transmission of signals to and from the chip.

    摘要翻译： 公开了一种用于半导体芯片的模块。 该模块包括具有平坦表面的散热器，半导体芯片的背面直接粘合在该散热器上。 芯片的暴露面具有电源，接地和信号触点阵列。 多个交流电源和接地母线跨越芯片的暴露面。 多层陶瓷位于母线阵列的另一侧，并且具有靠近电源和接地母线的表面，其具有至少对应于芯片上的信号触点的触点阵列。 电源引线将电源总线连接到芯片上的相邻电源触点; 接地引线将接地母线连接到芯片上的相邻接地触点; 并且信号引线在相邻的电源和接地母线之间通过，并将芯片上的信号触点与陶瓷上的相应信号触点相互连接。 多个连接器从陶瓷发出并且通过陶瓷的通孔或迹线电耦合到信号触头，以将信号传输到芯片和从芯片传输。

    Signal connection system for semiconductor chip
    2.
    发明授权
    Signal connection system for semiconductor chip 失效
    半导体芯片信号连接系统

    公开(公告)号：US4597029A

    公开(公告)日：1986-06-24

    申请号：US591342

    申请日：1984-03-19

    申请人： Andrzej Kucharek ,  John Marshall ,  James C. K. Lee ,  Carlton G. Amdahl ,  Leo Yuan

    发明人： Andrzej Kucharek ,  John Marshall ,  James C. K. Lee ,  Carlton G. Amdahl ,  Leo Yuan

    IPC分类号： H05K7/10 ,  H01R9/00

    CPC分类号： H05K7/1053

    摘要： A semiconductor chip having a two-dimensional array of contacts on an exposed face thereof is mounted in a semiconductor chip module. A mechanism for delivering electricity spans the exposed face of the chip to which it is connected and includes interstitial gaps. A conductor board has a surface proximate the electricity delivering mechanism opposite from the chip. The surface of the board has a two-dimensional array of contacts which correspond to at least some of the contacts on the chip. A biasing mechanism extends from the electricity delivering mechanism toward the exposed face of the semiconductor chip and toward the conductor board, and corresponds to the array of contacts on the chip and board. Signal leads pass through the interstitial gaps and have end portions which extend transversely over the biasing means. The end portions of the signal leads are biased against the contacts of the chips and board by the biasing mechanism.

    摘要翻译： 在半导体芯片模块中安装有在其暴露表面上具有二维接触阵列的半导体芯片。 用于传递电力的机构跨越与其连接的芯片的暴露面并且包括间隙。 导体板具有与芯片相对的电力输送机构的表面。 板的表面具有对应于芯片上的至少一些触点的触点的二维阵列。 偏置机构从电力输送机构朝向半导体芯片的露出面朝向导体板延伸，并且对应于芯片和板上的触点阵列。 信号引线通过间隙隙并且具有在偏置装置上横向延伸的端部。 信号引线的端部通过偏置机构偏置在芯片和板的触点上。

    Semiconductor chip module interconnection system
    3.
    发明授权
    Semiconductor chip module interconnection system 失效
    半导体芯片模块互连系统

    公开(公告)号：US4667220A

    公开(公告)日：1987-05-19

    申请号：US605018

    申请日：1984-04-27

    申请人： James C. K. Lee ,  Gene M. Amdahl ,  Carlton G. Amdahl ,  Richard L. Beck

    发明人： James C. K. Lee ,  Gene M. Amdahl ,  Carlton G. Amdahl ,  Richard L. Beck

    IPC分类号： H01L23/473 ,  H01L23/498 ,  H01L23/50 ,  H01L23/48 ,  H01L23/12 ,  H01L23/40 ,  H01L23/52

    CPC分类号： H01L23/49833 ,  H01L23/473 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/15173

    摘要： A module for a semiconductor chip having a front face with a two dimensional array of power, ground and signal contacts is disclosed. Power, ground and signal conductors extend from the respective contacts on the front face of the chip. A pair of electrically conductive plates are parallel to the front face of the chip and located at the termination of the conductors. The plate nearer the conductors is electrically coupled to either the power or ground conductors, and contains apertures corresponding to the remaining ground or power conductors and to the signal conductors. A plurality of discrete signal transmission members are located at a surface of the plate farther from the conductors. The ground or power conductors not connected to the near plate are electrically coupled to the far plate through certain of the apertures, and the signal conductors are coupled to the respective signal transmission members through the remaining apertures.

    摘要翻译： 公开了一种用于具有电源，接地和信号触点的二维阵列的正面的半导体芯片的模块。 电源，接地和信号导体从芯片正面的相应触点延伸。 一对导电板平行于芯片的前表面并且位于导体的终端处。 靠近导体的板电耦合到电源或接地导体，并且包含对应于剩余的接地或电力导体和信号导体的孔。 多个离散信号传输构件位于板的远离导体的表面。 未连接到近板的接地或电源导体通过某些孔电耦合到远板，并且信号导体通过剩余的孔耦合到相应的信号传输构件。

    Integrated circuit redundancy and method for achieving high-yield production
    4.
    发明授权
    Integrated circuit redundancy and method for achieving high-yield production 失效
    集成电路冗余和实现高产量生产的方法

    公开(公告)号：US4621201A

    公开(公告)日：1986-11-04

    申请号：US595097

    申请日：1984-03-30

    申请人： Carlton G. Amdahl ,  Gene M. Amdahl ,  Robert Reinschmidt

    发明人： Carlton G. Amdahl ,  Gene M. Amdahl ,  Robert Reinschmidt

    IPC分类号： H01L21/822 ,  G06F11/18 ,  H01L21/82 ,  H01L27/04 ,  H03K3/2885 ,  H03K17/60 ,  H03K17/62 ,  H03K19/003

    CPC分类号： G06F11/181 ,  G06F11/184 ,  G06F11/187 ,  H03K17/603 ,  H03K17/625 ,  H03K19/00392 ,  H03K3/2885

    摘要： A circuit structure, and method for forming the structure, permits wafer scale integration by fabricating plural copies of the circuit in integrated circuit form, and interconnecting predetermined circuit element groups of the copies in a manner that permits a majority voting operation to take place. In this manner, defective circuit elements are masked by being out-voted by corresponding non-defective circuit elements that participate in the voting process. Alternate embodiments of a voter unit, used to implement the voting operation, includes a preferred embodiment that takes advantage of emitter-coupled-logic structure to provide a multiplex, voter, latch combination capable of selectively implementing normal and diagnostic operation. Included in the preferred embodiment of the voter unit is a fused link that implements a repair operation in the event there exists more defective circuit element groups than non-defective circuit element groups participating in the voting process.

    摘要翻译： 用于形成该结构的电路结构和方法允许通过以集成电路形式制造多个电路副本并以允许进行多数投票操作的方式互连预定的电路元件组来复制晶片级整合。 以这种方式，通过被参与投票处理的相应的无缺陷电路元件的投票来掩蔽有缺陷的电路元件。 用于实施投票操作的选举单元的替代实施例包括利用发射极耦合逻辑结构来提供能够选择性地执行正常和诊断操作的多路复用，选择器，锁存器组合的优选实施例。 包括在选举单元的优选实施例中的是一种融合链路，其在存在比参与投票处理的非缺陷电路元件组更多的有缺陷的电路元件组的情况下实现修复操作。

    METHOD AND SYSTEM FOR DISTRIBUTING REQUESTS FOR CONTENT
    5.
    发明申请
    METHOD AND SYSTEM FOR DISTRIBUTING REQUESTS FOR CONTENT 有权
    分配内容要求的方法和系统

    公开(公告)号：US20110119354A1

    公开(公告)日：2011-05-19

    申请号：US12820010

    申请日：2010-06-21

    申请人： Patrick Duncan Jenny ,  Carlton G. Amdahl ,  Scott P. Tennican

    发明人： Patrick Duncan Jenny ,  Carlton G. Amdahl ,  Scott P. Tennican

    IPC分类号： G06F15/16

    CPC分类号： H04L67/2814 ,  H04L29/06 ,  H04L67/04 ,  H04L67/2819 ,  H04L67/2852 ,  H04L69/329

    摘要： A method and system for caching content, such as content requested from a server on the World Wide Web. Requests for dynamic content are forwarded directly to a content server to avoid caching data that might only be used once. Requests for static content are forwarded to a hot or a regular cache depending on the frequency at which the content is requested. When a hot cache does not contain the content, it forwards the request to the forwarder which then forwards the request to a regular cache. When the regular cache does not contain the content, it requests the content from the forwarder which then forwards the request to a content server. There may be more than two layers of cache.

    摘要翻译： 用于缓存内容的方法和系统，例如从万维网上的服务器请求的内容。 对动态内容的请求直接转发到内容服务器，以避免缓存只能使用一次的数据。 根据请求内容的频率，将静态内容的请求转发到热或常规高速缓存。 当热缓存不包含内容时，它将请求转发给转发器，转发器然后将请求转发到常规高速缓存。 当常规高速缓存不包含内容时，它请求来自转发器的内容，然后将该请求转发到内容服务器。 可能有两层以上的缓存。

    Computer and method for executing target instructions
    7.
    发明授权
    Computer and method for executing target instructions 失效
    用于执行目标指令的计算机和方法

    公开(公告)号：US4245302A

    公开(公告)日：1981-01-13

    申请号：US949924

    申请日：1978-10-10

    申请人： Carlton G. Amdahl

    发明人： Carlton G. Amdahl

    IPC分类号： G06F9/22 ,  G06F9/26 ,  G06F9/42 ,  G06F9/455

    CPC分类号： G06F9/265 ,  B65H2301/415525

    摘要： A microinstruction-controlled computer including a sequencer for controlling the sequencing of microinstructions. The computer executes target instructions by executing a number of microinstructions for each target instruction. Microinstructions are grouped in one or more microinstruction subroutines in a microstore. Microaddresses for addressing microinstructions and subroutines in the microstore are provided by a microaddress generator which includes a stack unit and other microaddress sources. The stack unit includes a stack memory and a link memory. The link memory stores, for each target instruction, a predetermined number of preloaded microaddresses where each such microaddress specifies the address of one of a number of subroutines employed to execute a particular target instruction. Sequential microaddresses in the link memory are accessed to link the subroutines employed in the execution of each target instruction.

    摘要翻译： 微指令控制计算机，包括用于控制微指令排序的定序器。 计算机通过对每个目标指令执行多个微指令来执行目标指令。 微指令分组在微型仓库中的一个或多个微指令子程序中。 用于寻址微型存储器中的微指令和子程序的微地址由微地址发生器提供，微地址发生器包括堆栈单元和其他微地址源。 堆栈单元包括堆栈存储器和链接存储器。 链接存储器针对每个目标指令存储预定数量的预加载的微地址，其中每个这样的微地址指定用于执行特定目标指令的多个子程序中的一个的地址。 访问链接存储器中的顺序微地址以链接在执行每个目标指令时使用的子程序。