公开(公告)号：US20100155721A1

公开(公告)日：2010-06-24

申请号：US12645433

申请日：2009-12-22

申请人： Je-Hun LEE ,  Tae-Hyung IHN ,  Dong-Hoon LEE ,  Do-Hyun KIM

发明人： Je-Hun LEE ,  Tae-Hyung IHN ,  Dong-Hoon LEE ,  Do-Hyun KIM

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/1225

摘要： A thin film transistor (TFT) array substrate is provided. The thin film transistor (TFT) array substrate includes an insulating substrate, an oxide semiconductor layer formed on the insulating substrate and including an additive element, a gate electrode overlapping the oxide semiconductor layer, and a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode, wherein the oxygen bond energy of the additive element is greater than that of a base element of the oxide semiconductor layer.

摘要翻译： 提供薄膜晶体管（TFT）阵列基板。 薄膜晶体管（TFT）阵列基板包括绝缘基板，形成在绝缘基板上并包括添加元件的氧化物半导体层，与氧化物半导体层重叠的栅极电极以及介于氧化物半导体层和 所述栅电极，其中所述添加元素的氧键能量大于所述氧化物半导体层的基体元素的氧键能。

公开(公告)号：US20100149476A1

公开(公告)日：2010-06-17

申请号：US12534300

申请日：2009-08-03

申请人： Do-Hyun KIM ,  Jong-Hyun CHOUNG ,  Young-Joo CHOI ,  Hong-Sick PARK ,  Tae-Hyung IHN ,  Dong-Hoon LEE ,  Pil-Sang YUN ,  Je-Hyeong PARK ,  Chang-Oh JEONG ,  Je-Hun LEE ,  Sun-Young HONG ,  Bong-Kyun KIM ,  Byeong-Jin LEE ,  Nam-Seok SUH

发明人： Do-Hyun KIM ,  Jong-Hyun CHOUNG ,  Young-Joo CHOI ,  Hong-Sick PARK ,  Tae-Hyung IHN ,  Dong-Hoon LEE ,  Pil-Sang YUN ,  Je-Hyeong PARK ,  Chang-Oh JEONG ,  Je-Hun LEE ,  Sun-Young HONG ,  Bong-Kyun KIM ,  Byeong-Jin LEE ,  Nam-Seok SUH

IPC分类号： G02F1/1333 ,  B05D5/12 ,  B44C1/22

CPC分类号： G02F1/136286 ,  G02F2001/133302 ,  G02F2001/136295

摘要： A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate.

摘要翻译： 显示基板包括： 基底基板，设置在基底基板的下表面的变形防止层，其中变形防止层向基底基板施加力以防止基底基板弯曲，设置在基底基板的上表面上的栅极线 设置在基底基板上的数据线，以及配置在基底基板上的像素电极。

公开(公告)号：US20110266538A1

公开(公告)日：2011-11-03

申请号：US13183711

申请日：2011-07-15

申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Tae-Hyung IHN

发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Tae-Hyung IHN

IPC分类号： H01L29/12 ,  H01L21/336 ,  H01L21/02 ,  H01L27/12

CPC分类号： H01L29/7869

摘要： An oxide or nitride semiconductor layer is formed over a substrate. A first conductive layer including a first element and a second element, and a second conductive layer including the second element are formed over the semiconductor layer. The first element is oxidized or nitrogenized near an interface region between the first conductive layer and the oxide or nitride semiconductor layer by heat treatment or laser irradiation. The Gibbs free energy of oxide formation of the first element is lower than those of the second element or any element in the oxide or nitride semiconductor layer.

摘要翻译： 在衬底上形成氧化物或氮化物半导体层。 包括第一元件和第二元件的第一导电层和包括第二元件的第二导电层形成在半导体层上。 第一元件通过热处理或激光照射在第一导电层和氧化物或氮化物半导体层之间的界面区域附近被氧化或氮化。 第一元件的氧化物形成的吉布斯自由能低于第二元素或氧化物或氮化物半导体层中的任何元素的自由能。

公开(公告)号：US20130005082A1

公开(公告)日：2013-01-03

申请号：US13608981

申请日：2012-09-10

申请人： Do-Hyun KIM ,  Je-Hun LEE ,  Pil-Sang YUN ,  Dong-Hoon LEE ,  Bong-Kyun KIM

发明人： Do-Hyun KIM ,  Je-Hun LEE ,  Pil-Sang YUN ,  Dong-Hoon LEE ,  Bong-Kyun KIM

IPC分类号： H01L21/336

CPC分类号： H01L27/1225 ,  H01L29/7869

摘要： A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an oxide semiconductor layer comprising a lower oxide layer formed on the gate electrode and an upper oxide layer formed on the lower oxide layer, such that the oxygen concentration of the upper oxide layer is higher than the oxygen concentration of the lower oxide layer; and a source electrode and a drain electrode formed on the oxide semiconductor layer and separated from each other.

摘要翻译： 提供具有高电荷迁移率并且可以提高阈值电压的薄膜晶体管阵列基板，以及制造薄膜晶体管阵列基板的方法。 薄膜晶体管阵列基板包括：绝缘基板; 形成在所述绝缘基板上的栅电极; 氧化物半导体层，其包括形成在所述栅电极上的低氧化物层和形成在所述低氧化物层上的上氧化物层，使得所述上氧化物层的氧浓度高于所述低氧化物层的氧浓度; 以及形成在氧化物半导体层上并且彼此分离的源电极和漏电极。

公开(公告)号：US20120211753A1

公开(公告)日：2012-08-23

申请号：US13328658

申请日：2011-12-16

申请人： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

发明人： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L33/00

CPC分类号： H01L27/1225 ,  H01L27/1288

摘要： In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

摘要翻译： 在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。 因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

公开(公告)号：US20110140103A1

公开(公告)日：2011-06-16

申请号：US13030213

申请日：2011-02-18

申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-OH JEONG

发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-OH JEONG

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288

摘要： A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.

摘要翻译： 薄膜晶体管包括半导体图案，源极和漏极以及栅极，半导体图案形成在基底基板上，半导体图案包括金属氧化物。 源极和漏极形成在半导体图案上，使得源极和漏极彼此间隔开，并且源极和漏极的轮廓与半导体图案的轮廓基本相同。 栅电极设置在源电极和漏电极之间的区域中，使得栅电极的一部分与源电极和漏电极重叠。 因此，由光引起的漏电流最小化。 结果，增强了薄膜晶体管的特性，减少了后图像以提高显示质量，并且提高了制造工艺的稳定性。

公开(公告)号：US20100051935A1

公开(公告)日：2010-03-04

申请号：US12509893

申请日：2009-07-27

申请人： Je-Hun LEE ,  Do-Hyun KIM

发明人： Je-Hun LEE ,  Do-Hyun KIM

IPC分类号： H01L33/00

CPC分类号： H01L27/1225 ,  G02F1/136286 ,  G02F1/1368 ,  H01L29/41733 ,  H01L29/78606 ,  H01L29/7869

摘要： A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel area, a common electrode formed on the insulating substrate, source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer, a passivation layer formed on the etch stopper, the common electrode, the source and drain electrodes, and a pixel electrode formed on the passivation layer and connected to the drain electrode.

摘要翻译： 提供一种液晶显示器及其制造方法。 液晶显示器包括绝缘基板，形成在绝缘基板上的栅电极，形成在栅电极上的氧化物半导体层，形成在沟道区中的氧化物半导体层上的蚀刻停止层，形成在绝缘基板上的公共电极 ，源电极和漏电极在蚀刻停止器上彼此分离并延伸到氧化物半导体层的上部，形成在蚀刻停止器上的钝化层，公共电极，源极和漏极以及形成在其上的像素电极 钝化层并连接到漏电极。

公开(公告)号：US20100065841A1

公开(公告)日：2010-03-18

申请号：US12555824

申请日：2009-09-09

申请人： Je-Hun LEE ,  Ki-Won KIM ,  Do-Hyun KIM ,  Woo-Geun LEE ,  Kap-Soo YOON

发明人： Je-Hun LEE ,  Ki-Won KIM ,  Do-Hyun KIM ,  Woo-Geun LEE ,  Kap-Soo YOON

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L27/1225 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

摘要翻译： TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。

公开(公告)号：US20080099765A1

公开(公告)日：2008-05-01

申请号：US11923914

申请日：2007-10-25

申请人： Do-Hyun KIM ,  Je-Hun LEE ,  Chang-Oh JEONG

发明人： Do-Hyun KIM ,  Je-Hun LEE ,  Chang-Oh JEONG

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L29/458

摘要： A thin film transistor substrate and fabricating method thereof, the thin film transistor substrate including a substrate, a gate line and a gate electrode, each including a metal adhesion layer and a Cu alloy layer disposed on the substrate, an active layer and an ohmic contact layer disposed over the gate electrode, a gate insulating layer disposed between the gate electrode and the active and ohmic contact layers, source and drain electrodes disposed on the ohmic contact layer, and a data line connected to the source electrode.

摘要翻译： 一种薄膜晶体管基板及其制造方法，所述薄膜晶体管基板包括基板，栅极线和栅电极，每个薄膜晶体管基板包括设置在基板上的金属粘合层和Cu合金层，有源层和欧姆接触 设置在栅极电极上的栅极绝缘层，设置在栅电极与有源欧姆接触层之间的栅极绝缘层，设置在欧姆接触层上的源电极和漏电极以及连接到源电极的数据线。

公开(公告)号：US20080017862A1

公开(公告)日：2008-01-24

申请号：US11779534

申请日：2007-07-18

申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-Oh JEONG

IPC分类号： H01L29/04 ,  H01L21/00

CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124

摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.

摘要翻译： 阵列基板包括开关元件，信号传输线，钝化层和像素电极。 开关元件设置在绝缘基板上。 信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。 阻挡层设置在绝缘基板上。 导电线设置在阻挡层上并且包括铜或铜合金。 氮化铜层覆盖导电线。 钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。 像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。