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    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME
    1.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US20130005082A1

    公开(公告)日：2013-01-03

    申请号：US13608981

    申请日：2012-09-10

    申请人： Do-Hyun KIM ,  Je-Hun LEE ,  Pil-Sang YUN ,  Dong-Hoon LEE ,  Bong-Kyun KIM

    发明人： Do-Hyun KIM ,  Je-Hun LEE ,  Pil-Sang YUN ,  Dong-Hoon LEE ,  Bong-Kyun KIM

    IPC分类号： H01L21/336

    CPC分类号： H01L27/1225 ,  H01L29/7869

    摘要： A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an oxide semiconductor layer comprising a lower oxide layer formed on the gate electrode and an upper oxide layer formed on the lower oxide layer, such that the oxygen concentration of the upper oxide layer is higher than the oxygen concentration of the lower oxide layer; and a source electrode and a drain electrode formed on the oxide semiconductor layer and separated from each other.

    摘要翻译： 提供具有高电荷迁移率并且可以提高阈值电压的薄膜晶体管阵列基板，以及制造薄膜晶体管阵列基板的方法。 薄膜晶体管阵列基板包括：绝缘基板; 形成在所述绝缘基板上的栅电极; 氧化物半导体层，其包括形成在所述栅电极上的低氧化物层和形成在所述低氧化物层上的上氧化物层，使得所述上氧化物层的氧浓度高于所述低氧化物层的氧浓度; 以及形成在氧化物半导体层上并且彼此分离的源电极和漏电极。

    DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME 有权
    显示基板及其制造方法

    公开(公告)号：US20100155715A1

    公开(公告)日：2010-06-24

    申请号：US12393521

    申请日：2009-02-26

    申请人： Pil-Sang YUN ,  Do-Hyun KIM ,  Byeong-Beom KIM ,  Bong-Kyun KIM

    发明人： Pil-Sang YUN ,  Do-Hyun KIM ,  Byeong-Beom KIM ,  Bong-Kyun KIM

    IPC分类号： H01L33/00 ,  H01L21/336

    CPC分类号： H01L27/12 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/78642

    摘要： A display substrate according to the present invention comprises a gate line formed on a substrate. a data line, a thin film transistor connected to the gate line and the data line respectively and pixel electrode connected to the thin film transistor, wherein a channel of the thin film transistor is formed in a direction perpendicular to the substrate and, a layer where the channel is formed includes an oxide semiconductor pattern. ON current of thin film transistor of the display substrate can be increased without loss of aperture ratio.

    摘要翻译： 根据本发明的显示基板包括形成在基板上的栅极线。 数据线，连接到栅极线和数据线的薄膜晶体管以及与薄膜晶体管连接的像素电极，其中薄膜晶体管的沟道在垂直于衬底的方向上形成，层 沟道形成包括氧化物半导体图案。 可以在不损失开口率的情况下增加显示基板的薄膜晶体管的导通电流。

    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME
    5.
    发明申请
    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号：US20100148169A1

    公开(公告)日：2010-06-17

    申请号：US12498816

    申请日：2009-07-07

    申请人： Do-Hyun KIM ,  Pil-Sang YUN ,  Ki-Won KIM ,  Dong-Hoon LEE ,  Chang-Oh JEONG

    发明人： Do-Hyun KIM ,  Pil-Sang YUN ,  Ki-Won KIM ,  Dong-Hoon LEE ,  Chang-Oh JEONG

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

    摘要： A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material.

    摘要翻译： 薄膜晶体管（TFT）基板具有改善的电性能和减少的外观缺陷以及制造TFT基板的方法。 TFT基板包括：形成在绝缘基板的表面上的栅极布线; 氧化物活性层图案，其形成在栅极布线上并且包括第一材料的氧化物; 缓冲层图案，其设置在所述氧化物活性层图案上以直接接触所述氧化物活性层图案并且包括第二材料; 以及形成在所述缓冲层图案上以绝缘地穿过所述栅极布线的数据布线，其中所述第一材料的氧化物的吉布斯自由能低于所述第二材料的氧化物的吉布斯自由能。

    DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME 有权
    显示基板，其制造方法

    公开(公告)号：US20110147740A1

    公开(公告)日：2011-06-23

    申请号：US12977853

    申请日：2010-12-23

    申请人： Ki-Hun JEONG ,  Do-Hyun KIM ,  Dong-Hoon LEE ,  Kap-Soo YOON ,  Jae-Ho CHOI ,  Sung-Hoon YANG ,  Pil-Sang YUN ,  Seung-Mi SEO

    发明人： Ki-Hun JEONG ,  Do-Hyun KIM ,  Dong-Hoon LEE ,  Kap-Soo YOON ,  Jae-Ho CHOI ,  Sung-Hoon YANG ,  Pil-Sang YUN ,  Seung-Mi SEO

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L29/78606 ,  H01L29/78633

    摘要： The present invention discloses a thin film transistor (TFT), a method for manufacturing the TFT, and a display substrate using the TFT that may prevent degradation of the characteristics of an oxide semiconductor contained in the TFT by blocking external light from entering a channel region of the oxide semiconductor. The TFT comprises an oxide semiconductor layer; a protective layer disposed on the oxide semiconductor layer and overlapping a channel region of the oxide semiconductor layer; an opaque layer disposed between the oxide semiconductor layer and the protective layer; a source electrode contacting a first side of the oxide semiconductor layer; a drain electrode contacting a second side of the oxide semiconductor layer and facing the source electrode with the channel region disposed between the drain electrode and the source electrode; a gate electrode to apply an electric field to the oxide semiconductor layer; and a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer.

    摘要翻译： 本发明公开了一种薄膜晶体管（TFT），TFT的制造方法以及使用该TFT的显示基板，其可以防止外部光阻挡进入沟道区域而使TFT中包含的氧化物半导体的特性劣化 的氧化物半导体。 TFT包括氧化物半导体层; 保护层，设置在所述氧化物半导体层上并与所述氧化物半导体层的沟道区域重叠; 设置在所述氧化物半导体层和所述保护层之间的不透明层; 与氧化物半导体层的第一面接触的源电极; 与所述氧化物半导体层的第二面接触且与所述源电极相对的漏电极，所述沟道区域设置在所述漏电极和所述源电极之间; 用于向氧化物半导体层施加电场的栅电极; 以及设置在栅电极和氧化物半导体层之间的栅极绝缘层。

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    显示面板及其制造方法

    公开(公告)号：US20090212290A1

    公开(公告)日：2009-08-27

    申请号：US12354115

    申请日：2009-01-15

    申请人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    发明人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    IPC分类号： H01L27/088 ,  H01L21/77

    CPC分类号： H01L33/0041 ,  H01L27/124 ,  H01L29/458

    摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译： 显示面板包括： 下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层， 下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    9.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 失效
    显示面板及其制造方法

    公开(公告)号：US20120228619A1

    公开(公告)日：2012-09-13

    申请号：US13472716

    申请日：2012-05-16

    申请人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    发明人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    IPC分类号： H01L29/786 ,  H01L33/08

    CPC分类号： H01L33/0041 ,  H01L27/124 ,  H01L29/458

    摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译： 显示面板包括： 下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层， 下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME
    10.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US20120037906A1

    公开(公告)日：2012-02-16

    申请号：US13115088

    申请日：2011-05-24

    申请人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

    发明人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

    IPC分类号： H01L29/786 ,  H01L21/44

    CPC分类号： H01L27/1214 ,  H01L27/1225 ,  H01L27/1255

    摘要： A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

    摘要翻译： 提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。 薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板，形成在绝缘基板上的栅极绝缘膜，设置在栅极绝缘膜上的氧化物半导体图案，形成在氧化物半导体上的抗蚀刻图案 图案，以及形成在防蚀刻图案上的源电极和漏电极。 氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分，并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。