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    Conductive organic non-volatile memory device with nanocrystals embedded in an amorphous barrier layer
    2.
    发明授权
    Conductive organic non-volatile memory device with nanocrystals embedded in an amorphous barrier layer 有权
    具有纳米晶体的导电有机非易失性存储器件嵌入在非晶形阻挡层中

    公开(公告)号：US08233313B2

    公开(公告)日：2012-07-31

    申请号：US13286861

    申请日：2011-11-01

    申请人： Jea-Gun Park ,  Sung-Ho Seo ,  Woo-Sik Nam ,  Young-Hwan Oh ,  Yool-Guk Kim ,  Hyun-Min Seung ,  Jong-Dae Lee

    发明人： Jea-Gun Park ,  Sung-Ho Seo ,  Woo-Sik Nam ,  Young-Hwan Oh ,  Yool-Guk Kim ,  Hyun-Min Seung ,  Jong-Dae Lee

    IPC分类号： G11C13/02 ,  H01L27/28

    CPC分类号： H01L27/285 ,  B82Y10/00 ,  G11C11/5664 ,  G11C13/0014 ,  G11C13/0016 ,  G11C2211/5614 ,  G11C2213/51 ,  G11C2216/06 ,  H01L51/0042 ,  H01L51/0591 ,  Y10S977/943

    摘要： A non-volatile memory device includes a plurality of unit cells. Each unit cell includes lower and upper electrodes over a substrate, a conductive organic material layer between the lower and the upper electrodes, and a nanocrystal layer located within the conductive organic material layer, wherein the nanocrystal layer includes a plurality of nanocrystals surrounded by an amorphous barrier. The unit cell receives a plurality of voltage ranges to perform a plurality of operations. A read operation is performed when an input voltage is in a first voltage range. A first write operation is performed when the input voltage is in a second voltage range higher than the first voltage range. A second write operation is performed when the input voltage is in a third voltage range higher than the second voltage range. An erase operation is performed when the input voltage is higher than the third voltage range.

    摘要翻译： 非易失性存储器件包括多个单元电池。 每个单元电池包括在基板上的下电极和上电极，在下电极和上电极之间的导电有机材料层和位于导电有机材料层内的纳米晶体层，其中纳米晶体层包括被非晶形态包围的多个纳米晶体 屏障。 单元接收多个电压范围以执行多个操作。 当输入电压处于第一电压范围时执行读操作。 当输入电压处于高于第一电压范围的第二电压范围时，执行第一写入操作。 当输入电压处于高于第二电压范围的第三电压范围时，执行第二写入操作。 当输入电压高于第三电压范围时，执行擦除操作。

    NONVOLATILE MEMORY DEVICE USING CONDUCTIVE ORGANIC POLYMER HAVING NANOCRYSTALS EMBEDDED THEREIN AND METHOD OF MANUFACTURING THE NONVLATILE MEMORY DEVICE
    4.
    发明申请
    NONVOLATILE MEMORY DEVICE USING CONDUCTIVE ORGANIC POLYMER HAVING NANOCRYSTALS EMBEDDED THEREIN AND METHOD OF MANUFACTURING THE NONVLATILE MEMORY DEVICE 审中-公开
    使用具有嵌入的纳米晶体的导电有机聚合物的非易失性存储器件和制造非易失性存储器件的方法

    公开(公告)号：US20090008633A1

    公开(公告)日：2009-01-08

    申请号：US12108590

    申请日：2008-04-24

    申请人： Jea-Gun Park ,  Ungyu Paik ,  Hyun-Min Seung ,  Sangkyu Lee ,  Byeong-Il Han

    发明人： Jea-Gun Park ,  Ungyu Paik ,  Hyun-Min Seung ,  Sangkyu Lee ,  Byeong-Il Han

    IPC分类号： H01L51/00 ,  H01L51/40

    CPC分类号： H01L51/0575 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016 ,  G11C2211/5614 ,  H01L51/0042 ,  H01L51/0591

    摘要： A nonvolatile memory device and a method of manufacturing the same are provided. The nonvolatile memory device which is convertible among a high current state, an intermediate current state, and a low current state, said device includes upper and lower conductive layers; a conductive organic layer comprising a conductive organic polymer and which is formed between the upper and lower conductive layers and has a bistable conduction property; and nanocrystals are formed in the conductive organic layer. The conductive organic polymer may be poly-N-vinylcarbazole (PVK) or polystyrene (PS). The method is characterized in that a conductive organic layer is formed by applying a conductive organic material such as PVK or PS using spin coating. Therefore, it is possible to provide a highly-integrated memory device that consumes less power and provides high operating speed. In addition, it is possible to provide the thermal stability of a memory device by using a conductive organic polymer. Moreover, it is possible to reduce the time required to deposit a conductive organic layer by forming a conductive layer using spin coating. Furthermore, it is possible to form a conductive organic layer in various shapes by using mask patterns that can be formed on a substrate in various shapes.

    摘要翻译： 提供了一种非易失性存储器件及其制造方法。 所述非易失性存储器件可在高电流状态，中等电流状态和低电流状态之间转换，所述器件包括上导电层和下导电层; 导电有机层，其包含导电有机聚合物并且形成在所述上导电层和所述下导电层之间并且具有双稳态导电性; 并且在导电有机层中形成纳米晶体。 导电有机聚合物可以是聚-N-乙烯基咔唑（PVK）或聚苯乙烯（PS）。 该方法的特征在于，通过使用旋转涂布施加诸如PVK或PS的导电有机材料来形成导电有机层。 因此，可以提供消耗较少功率并提供高操作速度的高度集成的存储器件。 此外，可以通过使用导电有机聚合物来提供存储器件的热稳定性。 此外，可以通过使用旋涂形成导电层来减少沉积导电有机层所需的时间。 此外，可以通过使用可以形成在各种形状的基板上的掩模图案来形成各种形状的导电有机层。

    METHOD OF MANUFACTURING NONVOLATILE MEMORY DEVICE USING CONDUCTIVE ORGANIC POLYMER HAVING NANOCRYSTALS EMBEDDED THEREIN
    5.
    发明申请
    METHOD OF MANUFACTURING NONVOLATILE MEMORY DEVICE USING CONDUCTIVE ORGANIC POLYMER HAVING NANOCRYSTALS EMBEDDED THEREIN 审中-公开
    使用具有嵌入的纳米晶体的导电有机聚合物制造非易失性存储器件的方法

    公开(公告)号：US20080305574A1

    公开(公告)日：2008-12-11

    申请号：US12108612

    申请日：2008-04-24

    申请人： Jea-Gun Park ,  Gon-Sub Lee ,  Byeong-Il Han ,  Jong-Dae Lee

    发明人： Jea-Gun Park ,  Gon-Sub Lee ,  Byeong-Il Han ,  Jong-Dae Lee

    IPC分类号： H01L51/30

    CPC分类号： H01L51/0575 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016 ,  G11C2211/5614 ,  H01L51/0042 ,  H01L51/0591

    摘要： The method of manufacturing a nonvolatile memory device includes forming a lower conductive layer on a substrate; forming a first conductive organic layer on the substrate using spin coating; forming a metal layer for forming nanocrystals on the first conductive organic layer, the metal layer partially overlapping the first conductive organic layer; forming a second conductive organic layer on the first conductive organic layer using spin coating; transforming the metal layer into nanocrystals by curing; and forming an upper conductive layer on the second conductive organic layer, the upper conductive layer partially overlapping the nanocrystals. The conductive organic polymer may be poly-N-vinylcarbazole (PVK) or polystyrene (PS).

    摘要翻译： 非易失性存储器件的制造方法包括在基板上形成下导电层; 使用旋涂在所述基板上形成第一导电有机层; 在所述第一导电有机层上形成用于形成纳米晶体的金属层，所述金属层与所述第一导电有机层部分重叠; 使用旋涂在所述第一导电有机层上形成第二导电有机层; 通过固化将金属层转化为纳米晶体; 以及在所述第二导电有机层上形成上导电层，所述上导电层部分地与所述纳米晶体重叠。 导电有机聚合物可以是聚-N-乙烯基咔唑（PVK）或聚苯乙烯（PS）。

    CAPACITOR-LESS MEMORY DEVICE
    7.
    发明申请
    CAPACITOR-LESS MEMORY DEVICE 有权
    无电容器存储器件

    公开(公告)号：US20110127580A1

    公开(公告)日：2011-06-02

    申请号：US12990353

    申请日：2009-04-30

    申请人： Jea-Gun Park ,  Tae-Hun Shim ,  Gon-Sub Lee ,  Seong-Je Kim ,  Tae-Hyun Kim

    发明人： Jea-Gun Park ,  Tae-Hun Shim ,  Gon-Sub Lee ,  Seong-Je Kim ,  Tae-Hyun Kim

    IPC分类号： H01L29/772

    CPC分类号： H01L29/4234 ,  G11C11/404 ,  G11C16/0466 ,  G11C2211/4016 ,  H01L27/10802 ,  H01L29/7841 ,  H01L29/78687 ,  H01L29/78696

    摘要： Provided is a capacitorless memory device. The device includes a semiconductor substrate, an insulating layer disposed on the semiconductor substrate, a storage region disposed on a partial region of the insulating layer, a channel region disposed on the storage region to provide a valence band energy offset between the channel region and the storage region, a gate insulating layer and a gate electrode sequentially disposed on the channel region, and source and drain regions connected to the channel region and disposed at both sides of the gate electrode. A storage region having different valence band energy from a channel region is disposed under the channel region unit so that charges trapped in the storage region unit cannot be easily drained. Thus, a charge retention time may be increased to improve data storage capability.

    摘要翻译： 提供了一种无电容器存储器件。 所述器件包括半导体衬底，设置在所述半导体衬底上的绝缘层，设置在所述绝缘层的部分区域上的存储区域，设置在所述存储区域上以在所述沟道区域和所述沟道区域之间提供价带能量偏移的沟道区域 顺序地设置在沟道区上的栅极绝缘层和栅电极以及连接到沟道区并设置在栅电极两侧的源极和漏极区。 在通道区域单元的下方配置具有与通道区域不同的价带能量的存储区域，使得捕获在存储区域单元中的电荷不容易排出。 因此，可以增加电荷保留时间以提高数据存储能力。

    DOUBLE-SIDED LIGHT-COLLECTING ORGANIC SOLAR CELL
    8.
    发明申请
    DOUBLE-SIDED LIGHT-COLLECTING ORGANIC SOLAR CELL 审中-公开
    双面收集有机太阳能电池

    公开(公告)号：US20120118366A1

    公开(公告)日：2012-05-17

    申请号：US13387613

    申请日：2010-07-07

    申请人： Jea-Gun Park ,  Su-Hwan Lee ,  Ji-Heon Kim ,  Dal-Ho Kim

    发明人： Jea-Gun Park ,  Su-Hwan Lee ,  Ji-Heon Kim ,  Dal-Ho Kim

    IPC分类号： H01L51/44

    CPC分类号： H01L27/302

    摘要： Disclosed is a double-sided light-collecting organic solar cell. The double-sided light-collecting organic solar cell comprises: a first light-transmitting electrode; a first photoactive layer disposed on the first light-transmitting electrode; a reflective electrode disposed on the first photoactive layer; a second photoactive layer disposed on the reflective electrode; and a second light-transmitting electrode disposed on the second photoactive layer. According to the present invention, photoactive layers are formed on both sides of a reflective electrode in the middle, and light-transmitting electrodes are formed to enable light to be absorbed at both sides of a cell, to increase the light absorption of the cell and enable the production of a highly efficient organic solar cell.

    摘要翻译： 公开了一种双面收光有机太阳能电池。 双面收集有机太阳能电池包括：第一透光电极; 设置在第一透光电极上的第一光敏层; 设置在所述第一光活性层上的反射电极; 设置在反射电极上的第二光敏层; 以及设置在所述第二光活性层上的第二透光电极。 根据本发明，在中间的反射电极的两侧形成光敏层，并且形成透光电极以使光能够在电池的两侧被吸收，以增加电池的光吸收， 能够生产高效的有机太阳能电池。

    MULTI-SELECTIVE POLISHING SLURRY COMPOSITION AND A SEMICONDUCTOR ELEMENT PRODUCTION METHOD USING THE SAME
    9.
    发明申请
    MULTI-SELECTIVE POLISHING SLURRY COMPOSITION AND A SEMICONDUCTOR ELEMENT PRODUCTION METHOD USING THE SAME 审中-公开
    多选择性抛光浆料组合物和使用其的半导体元件生产方法

    公开(公告)号：US20120190201A1

    公开(公告)日：2012-07-26

    申请号：US13386494

    申请日：2010-07-09

    申请人： Jea-Gun Park ,  Un-Gyu Paik ,  Jin-Hyung Park ,  Hao Cui ,  Jong-Young Cho ,  Hee-Sub Hwang ,  Jae-Hyung Lim ,  Ye-Hwan Kim

    发明人： Jea-Gun Park ,  Un-Gyu Paik ,  Jin-Hyung Park ,  Hao Cui ,  Jong-Young Cho ,  Hee-Sub Hwang ,  Jae-Hyung Lim ,  Ye-Hwan Kim

    IPC分类号： H01L21/306 ,  C09K13/00

    CPC分类号： H01L21/31056 ,  C09G1/02 ,  C09K3/1463 ,  H01L21/31053 ,  H01L21/3212

    摘要： Provided are a multi-selective polishing slurry composition and a semiconductor element production method using the same. A silicon film provided with element patterns is formed on the uppermost part of a substrate having a first region and a second region. The element pattern density on the first region is higher than the element pattern density on the second region. Formed in sequence on top of the element patterns are a first silicon oxide film, a silicon nitride film and a second silicon oxide film. The substrate is subjected to chemical-mechanical polishing until the silicon film is exposed, by using a polishing slurry composition containing a polishing agent, a silicon nitride film passivation agent and a silicon film passivation agent. The polishing slurry composition may be a mixture of 100 parts by weight of a polishing agent suspension, containing a polishing agent, and from 40 to 120 parts by weight of an additive solution, and the additive solution can contain 100 parts by weight of a solvent, from 0.01 to 5 parts by weight of a silicon nitride film passivation agent and from 0.01 to 5 parts by weight of a silicon film passivation agent.

    摘要翻译： 提供多选择性研磨浆料组合物和使用其的半导体元件制造方法。 具有元件图案的硅膜形成在具有第一区域和第二区域的基板的最上部。 第一区域上的元件图案密度高于第二区域上的元件图案密度。 在元件图案顶部依次形成第一氧化硅膜，氮化硅膜和第二氧化硅膜。 通过使用包含抛光剂，氮化硅膜钝化剂和硅膜钝化剂的抛光浆料组合物，对基材进行化学机械抛光，直到暴露硅膜。 抛光浆料组合物可以是100重量份的含有抛光剂的抛光剂悬浮液和40至120重量份的添加剂溶液的混合物，并且添加剂溶液可以包含100重量份的溶剂 ，0.01〜5重量份的氮化硅膜钝化剂和0.01〜5重量份的硅膜钝化剂。

    Capacitor-less memory device
    10.
    发明授权
    Capacitor-less memory device 有权
    无电容存储器件

    公开(公告)号：US08860109B2

    公开(公告)日：2014-10-14

    申请号：US12990353

    申请日：2009-04-30

    申请人： Jea-Gun Park ,  Tae-Hun Shim ,  Gon-Sub Lee ,  Seong-Je Kim ,  Tae-Hyun Kim

    发明人： Jea-Gun Park ,  Tae-Hun Shim ,  Gon-Sub Lee ,  Seong-Je Kim ,  Tae-Hyun Kim

    IPC分类号： H01L27/108 ,  H01L29/78 ,  G11C11/404 ,  H01L29/423 ,  G11C16/04 ,  H01L29/786

    CPC分类号： H01L29/4234 ,  G11C11/404 ,  G11C16/0466 ,  G11C2211/4016 ,  H01L27/10802 ,  H01L29/7841 ,  H01L29/78687 ,  H01L29/78696

    摘要： Provided is a capacitorless memory device. The device includes a semiconductor substrate, an insulating layer disposed on the semiconductor substrate, a storage region disposed on a partial region of the insulating layer, a channel region disposed on the storage region to provide a valence band energy offset between the channel region and the storage region, a gate insulating layer and a gate electrode sequentially disposed on the channel region, and source and drain regions connected to the channel region and disposed at both sides of the gate electrode. A storage region having different valence band energy from a channel region is disposed under the channel region unit so that charges trapped in the storage region unit cannot be easily drained. Thus, a charge retention time may be increased to improve data storage capability.

    摘要翻译： 提供了一种无电容器存储器件。 所述器件包括半导体衬底，设置在所述半导体衬底上的绝缘层，设置在所述绝缘层的部分区域上的存储区域，设置在所述存储区域上以在所述沟道区域和所述沟道区域之间提供价带能量偏移的沟道区域 顺序地设置在沟道区上的栅极绝缘层和栅电极以及连接到沟道区并设置在栅电极两侧的源极和漏极区。 在通道区域单元的下方配置具有与通道区域不同的价带能量的存储区域，使得捕获在存储区域单元中的电荷不容易排出。 因此，可以增加电荷保留时间以提高数据存储能力。