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100 条记录 (耗时 0.026 秒)

    Gap filling with a composite layer
    1.
    发明申请
    Gap filling with a composite layer 失效
    间隙填充复合层

    公开(公告)号：US20050277257A1

    公开(公告)日：2005-12-15

    申请号：US10857829

    申请日：2004-06-01

    申请人： Jeong Byun ,  Zheng Yuan ,  Shankar Venkataraman ,  M. Karim ,  Thanh Pham ,  Ellie Yieh

    发明人： Jeong Byun ,  Zheng Yuan ,  Shankar Venkataraman ,  M. Karim ,  Thanh Pham ,  Ellie Yieh

    IPC分类号： H01L21/76 ,  H01L21/762

    CPC分类号： H01L21/76224

    摘要： A method of filling a gap formed between adjacent raised surfaces on a substrate. In one embodiment the method comprises depositing a boron-doped silica glass (BSG) layer over the substrate to partially fill the gap using a thermal CVD process; exposing the BSG layer to a steam ambient at a temperature above the BSG layer's Eutectic temperature; removing an upper portion of the BSG layer by exposing the layer to a fluorine-containing etchant; and depositing an undoped silica glass (USG) layer over the BSG layer to fill the remainder of the gap.

    摘要翻译： 填充在基板上相邻的凸起表面之间形成的间隙的方法。 在一个实施例中，该方法包括在衬底上沉积硼掺杂石英玻璃（BSG）层，以使用热CVD工艺部分填充间隙; 在高于BSG层的共晶温度的温度下将BSG层暴露于蒸汽环境; 通过将层暴露于含氟蚀刻剂来除去BSG层的上部; 以及在BSG层上沉积未掺杂的二氧化硅玻璃（USG）层以填补间隙的剩余部分。

    Method of inducing stresses in the channel region of a transistor
    2.
    发明申请
    Method of inducing stresses in the channel region of a transistor 失效
    在晶体管的沟道区域中产生应力的方法

    公开(公告)号：US20050255667A1

    公开(公告)日：2005-11-17

    申请号：US10846734

    申请日：2004-05-14

    申请人： Reza Arghavani ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkataraman ,  Nitin Ingle

    发明人： Reza Arghavani ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkataraman ,  Nitin Ingle

    IPC分类号： H01L21/336 ,  H01L21/76 ,  H01L21/8238 ,  H01L29/00 ,  H01L29/78

    CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7846

    摘要： A method of fabricating a semiconductor device, where the method includes forming on a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.

    摘要翻译： 一种制造半导体器件的方法，其中所述方法包括在衬底上的晶体管上形成晶体管，其中所述晶体管包括被配置为在源极区域和漏极区域之间导电的沟道区域，形成与所述晶体管相邻的沟槽， 材料在衬底上并在沟槽内，并退火材料，其中材料在退火之后是拉伸的，并且在沟道区域中产生拉伸应力。 另外，在半导体器件中形成沟槽隔离的方法，其中所述方法包括在衬底中形成沟槽，以较低的沉积速率在沟槽内形成材料，在衬底上以更高的沉积速率在衬底上形成材料 在沟槽内沉积材料并退火材料，其中在退火之后，沟槽中的材料是拉伸的。

    GAP-FILL DEPOSITIONS IN THE FORMATION OF SILICON CONTAINING DIELECTRIC MATERIALS
    4.
    发明申请
    GAP-FILL DEPOSITIONS IN THE FORMATION OF SILICON CONTAINING DIELECTRIC MATERIALS 审中-公开
    形成含硅介质材料的GAP填充沉积

    公开(公告)号：US20070212850A1

    公开(公告)日：2007-09-13

    申请号：US11686863

    申请日：2007-03-15

    申请人： Nitin Ingle ,  Sidharth Bhatia ,  Won Bang ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkatraman

    发明人： Nitin Ingle ,  Sidharth Bhatia ,  Won Bang ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkatraman

    IPC分类号： H01L21/762

    CPC分类号： C23C16/045 ,  C23C16/402 ,  C23C16/448 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31612 ,  H01L21/76224 ,  H01L21/76837

    摘要： A chemical vapor deposition method for forming a dielectric material in a trench formed on a substrate, where the method includes the steps of generating water vapor by contacting hydrogen gas and oxygen gas with a water vapor generation catalyst, and providing the water vapor to the process chamber. The method also includes flowing a silicon-containing precursor into the process chamber housing the substrate, flowing an oxidizing gas into the chamber, and causing a reaction between the silicon-containing precursor, the oxidizing gas and the water vapor to form the dielectric material in the trench. The method may also include increasing over time a ratio of the silicon-containing precursor to the oxidizing gas flowed into the chamber to alter a rate of deposition of the dielectric material.

    摘要翻译： 一种用于在形成在衬底上的沟槽中形成电介质材料的化学气相沉积方法，其中所述方法包括通过使氢气和氧气与水蒸汽发生催化剂接触而产生水蒸气的步骤，并将水蒸汽提供给该过程 房间。 该方法还包括将含硅前体流入容纳基底的处理室，使氧化气体流入室内，并使含硅前体，氧化气体和水蒸汽之间的反应形成为 沟渠。 该方法还可以包括随着时间的推移，含硅前体与氧化气体的比例流入室以改变电介质材料的沉积速率。

    Method of inducing stresses in the channel region of a transistor
    8.
    发明授权
    Method of inducing stresses in the channel region of a transistor 失效
    在晶体管的沟道区域中产生应力的方法

    公开(公告)号：US07528051B2

    公开(公告)日：2009-05-05

    申请号：US10846734

    申请日：2004-05-14

    申请人： Reza Arghavani ,  Zheng Yuan ,  Ellie Y. Yieh ,  Shankar Venkataraman ,  Nitin K. Ingle

    发明人： Reza Arghavani ,  Zheng Yuan ,  Ellie Y. Yieh ,  Shankar Venkataraman ,  Nitin K. Ingle

    IPC分类号： H01L21/76

    CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7846

    摘要： A method of fabricating a semiconductor device, where the method includes forming a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.

    摘要翻译： 一种制造半导体器件的方法，其中所述方法包括在衬底上形成晶体管，其中所述晶体管包括被配置为在源极区域和漏极区域之间传导电荷的沟道区域，形成与所述晶体管相邻的沟槽， 在衬底上和沟槽内，并对材料进行退火，其中材料在退火之后是拉伸的，并且在沟道区域中产生拉伸应力。 另外，在半导体器件中形成沟槽隔离的方法，其中所述方法包括在衬底中形成沟槽，以较低的沉积速率在沟槽内形成材料，在衬底上以更高的沉积速率在衬底上形成材料 在沟槽内沉积材料并退火材料，其中在退火之后，沟槽中的材料是拉伸的。

    Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
    10.
    发明授权
    Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill 有权
    TEOS /臭氧CVD的一氧化二氮退火以改善间隙填料

    公开(公告)号：US07141483B2

    公开(公告)日：2006-11-28

    申请号：US10757771

    申请日：2004-01-14

    申请人： Zheng Yuan ,  Reza Arghavani ,  Shankar Venkataraman

    发明人： Zheng Yuan ,  Reza Arghavani ,  Shankar Venkataraman

    IPC分类号： H01L21/76 ,  H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/31612 ,  C23C16/045 ,  C23C16/401 ,  C23C16/402 ,  C23C16/45512 ,  C23C16/45523 ,  C23C16/52 ,  C23C16/56 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02312 ,  H01L21/76224 ,  H01L21/76822 ,  H01L21/76828 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of filling a gap defined by adjacent raised features on a substrate includes providing a flow of a silicon-containing processing gas to a chamber housing the substrate and providing a flow of an oxidizing gas to the chamber. The method also includes depositing a first portion of a film as a substantially conformal layer in the gap by causing a reaction between the silicon-containing processing gas and the oxidizing gas. Depositing the conformal layer includes varying over time a ratio of the (silicon-containing processing gas):(oxidizing gas) and regulating the chamber to a pressure in a range from about 200 torr to about 760 torr throughout deposition of the conformal layer. The method also includes depositing a second portion of the film as a bulk layer. Depositing a second portion of the film includes maintaining the ratio of the (silicon-containing processing gas):(oxidizing gas) substantially constant throughout deposition of the bulk layer and regulating the chamber to a pressure in a range from about 200 torr to about 760 torr throughout deposition of the bulk layer. The method also includes exposing the substrate to nitrous oxide at a temperature less than about 900° C. to anneal the deposited film.

    摘要翻译： 填充由衬底上的相邻凸起特征限定的间隙的方法包括提供含硅处理气体流到容纳衬底并且向腔室提供氧化气体流的腔室。 该方法还包括通过引起含硅处理气体和氧化气体之间的反应，将膜的第一部分沉积在间隙中作为基本上共形的层。 沉积保形层包括随着时间的推移，在沉积共形层的过程中，（含硅处理气体）:(氧化气体）的比例和室的调节范围为约200托至约760托的压力。 该方法还包括将膜的第二部分沉积为本体层。 沉积薄膜的第二部分包括在沉积主体层期间保持（含硅处理气体）:(氧化气体）的比例基本上恒定，并将室调节到约200托至约760的范围内的压力 托盘在整个堆积层的沉积中。 该方法还包括在小于约900℃的温度下将衬底暴露于一氧化二氮以使沉积的膜退火。