公开(公告)号：US20050255667A1

公开(公告)日：2005-11-17

申请号：US10846734

申请日：2004-05-14

申请人： Reza Arghavani ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkataraman ,  Nitin Ingle

发明人： Reza Arghavani ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkataraman ,  Nitin Ingle

IPC分类号： H01L21/336 ,  H01L21/76 ,  H01L21/8238 ,  H01L29/00 ,  H01L29/78

CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7846

摘要： A method of fabricating a semiconductor device, where the method includes forming on a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.

摘要翻译： 一种制造半导体器件的方法，其中所述方法包括在衬底上的晶体管上形成晶体管，其中所述晶体管包括被配置为在源极区域和漏极区域之间导电的沟道区域，形成与所述晶体管相邻的沟槽， 材料在衬底上并在沟槽内，并退火材料，其中材料在退火之后是拉伸的，并且在沟道区域中产生拉伸应力。 另外，在半导体器件中形成沟槽隔离的方法，其中所述方法包括在衬底中形成沟槽，以较低的沉积速率在沟槽内形成材料，在衬底上以更高的沉积速率在衬底上形成材料 在沟槽内沉积材料并退火材料，其中在退火之后，沟槽中的材料是拉伸的。

公开(公告)号：US20070212850A1

公开(公告)日：2007-09-13

申请号：US11686863

申请日：2007-03-15

申请人： Nitin Ingle ,  Sidharth Bhatia ,  Won Bang ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkatraman

发明人： Nitin Ingle ,  Sidharth Bhatia ,  Won Bang ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkatraman

IPC分类号： H01L21/762

CPC分类号： C23C16/045 ,  C23C16/402 ,  C23C16/448 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31612 ,  H01L21/76224 ,  H01L21/76837

摘要： A chemical vapor deposition method for forming a dielectric material in a trench formed on a substrate, where the method includes the steps of generating water vapor by contacting hydrogen gas and oxygen gas with a water vapor generation catalyst, and providing the water vapor to the process chamber. The method also includes flowing a silicon-containing precursor into the process chamber housing the substrate, flowing an oxidizing gas into the chamber, and causing a reaction between the silicon-containing precursor, the oxidizing gas and the water vapor to form the dielectric material in the trench. The method may also include increasing over time a ratio of the silicon-containing precursor to the oxidizing gas flowed into the chamber to alter a rate of deposition of the dielectric material.

摘要翻译： 一种用于在形成在衬底上的沟槽中形成电介质材料的化学气相沉积方法，其中所述方法包括通过使氢气和氧气与水蒸汽发生催化剂接触而产生水蒸气的步骤，并将水蒸汽提供给该过程 房间。 该方法还包括将含硅前体流入容纳基底的处理室，使氧化气体流入室内，并使含硅前体，氧化气体和水蒸汽之间的反应形成为 沟渠。 该方法还可以包括随着时间的推移，含硅前体与氧化气体的比例流入室以改变电介质材料的沉积速率。

公开(公告)号：US08759223B2

公开(公告)日：2014-06-24

申请号：US13593412

申请日：2012-08-23

申请人： Kedar Sapre ,  Jing Tang ,  Ajay Bhatnagar ,  Nitin Ingle ,  Shankar Venkataraman

发明人： Kedar Sapre ,  Jing Tang ,  Ajay Bhatnagar ,  Nitin Ingle ,  Shankar Venkataraman

IPC分类号： H01L21/311 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31144 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31116

摘要： A method of etching a substrate comprises forming on the substrate, a plurality of double patterning features composed of silicon oxide, silicon nitride, or silicon oxynitride. The substrate having the double patterning features is provided to a process zone. An etching gas comprising nitrogen tri-fluoride, ammonia and hydrogen is energized in a remote chamber. The energized etching gas is introduced into the process zone to etch the double patterning features to form a solid residue on the substrate. The solid residue is sublimated by heating the substrate to a temperature of at least about 100° C.

摘要翻译： 蚀刻衬底的方法包括在衬底上形成由氧化硅，氮化硅或氮氧化硅组成的多个双重构图特征。 具有双重图案化特征的基板被提供到处理区域。 包括三氟化氮，氨和氢的蚀刻气体在远程室中通电。 通电的蚀刻气体被引入到工艺区中以蚀刻双重图案化特征以在衬底上形成固体残余物。 固体残余物通过将基底加热至至少约100℃的温度升华。

公开(公告)号：US20130048605A1

公开(公告)日：2013-02-28

申请号：US13593412

申请日：2012-08-23

申请人： Kedar SAPRE ,  Jing Tang ,  Ajay Bhatnagar ,  Nitin Ingle ,  Shankar Venkataraman

发明人： Kedar SAPRE ,  Jing Tang ,  Ajay Bhatnagar ,  Nitin Ingle ,  Shankar Venkataraman

IPC分类号： B44C1/22

CPC分类号： H01L21/31144 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31116

摘要： A method of etching a substrate comprises forming on the substrate, a plurality of double patterning features composed of silicon oxide, silicon nitride, or silicon oxynitride. The substrate having the double patterning features is provided to a process zone. An etching gas comprising nitrogen tri-fluoride, ammonia and hydrogen is energized in a remote chamber. The energized etching gas is introduced into the process zone to etch the double patterning features to form a solid residue on the substrate. The solid residue is sublimated by heating the substrate to a temperature of at least about 100° C.

摘要翻译： 蚀刻衬底的方法包括在衬底上形成由氧化硅，氮化硅或氮氧化硅组成的多个双重构图特征。 具有双重图案化特征的基板被提供到处理区域。 包括三氟化氮，氨和氢的蚀刻气体在远程室中通电。 通电的蚀刻气体被引入到工艺区中以蚀刻双重图案化特征以在衬底上形成固体残余物。 固体残余物通过将基底加热至至少约100℃的温度升华。

公开(公告)号：US20120009796A1

公开(公告)日：2012-01-12

申请号：US12909167

申请日：2010-10-21

申请人： Zhenjiang Cui ,  Anchuan Wang ,  Mehul Naik ,  Nitin Ingle ,  Young Lee ,  Shankar Venkataraman

发明人： Zhenjiang Cui ,  Anchuan Wang ,  Mehul Naik ,  Nitin Ingle ,  Young Lee ,  Shankar Venkataraman

IPC分类号： H01L21/3065

CPC分类号： H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76814

摘要： Methods of decreasing the effective dielectric constant present between two conducting components of an integrated circuit are described. The methods involve the use of a gas phase etch which is selective towards the oxygen-rich portion of the low-K dielectric layer. The etch rate attenuates as the etch process passes through the relatively high-K oxygen-rich portion and reaches the low-K portion. The etch process may be easily timed since the gas phase etch process does not readily remove the desirable low-K portion.

摘要翻译： 描述了降低集成电路的两个导电部件之间存在的有效介电常数的方法。 该方法包括使用对低K电介质层的富氧部分具有选择性的气相蚀刻。 当蚀刻工艺通过较高K富氧部分并达到低K部分时，蚀刻速率衰减。 由于气相蚀刻工艺不容易除去所需的低K部分，所以蚀刻工艺可以容易地定时。

公开(公告)号：US08435902B2

公开(公告)日：2013-05-07

申请号：US12959155

申请日：2010-12-02

申请人： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

发明人： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

IPC分类号： H01L21/302 ,  H01L21/461 ,  H01L21/311 ,  C23F3/00

CPC分类号： H01L21/31116 ,  H01J37/32091

摘要： A method of etching silicon oxide from a narrow trench and a wide trench (or open area) is described which allows the etch in the wide trench to progress further than the etch in the narrow trench. The method includes two dry etch cycles. The first dry etch cycle involves a low intensity or abbreviated sublimation step which leaves solid residue in the narrow trench. The remaining solid residue inhibits etch progress in the narrow trench during the second dry etch cycle allowing the etch in the wide trench to overtake the etch in the narrow trench.

摘要翻译： 描述了从窄沟槽和宽沟槽（或开放区域）中蚀刻氧化硅的方法，其允许宽沟槽中的蚀刻比窄沟槽中的蚀刻进一步进行。 该方法包括两个干蚀刻循环。 第一干蚀刻循环涉及低强度或缩写升华步骤，其在窄沟槽中留下固体残留物。 剩余的固体残余物在第二干蚀刻循环期间抑制窄沟槽中的蚀刻进程，允许宽沟槽中的蚀刻超过窄沟槽中的蚀刻。

公开(公告)号：US20110230052A1

公开(公告)日：2011-09-22

申请号：US12959155

申请日：2010-12-02

申请人： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

发明人： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

IPC分类号： H01L21/3065

CPC分类号： H01L21/31116 ,  H01J37/32091

摘要： A method of etching silicon oxide from a narrow trench and a wide trench (or open area) is described which allows the etch in the wide trench to progress further than the etch in the narrow trench. The method includes two dry etch cycles. The first dry etch cycle involves a low intensity or abbreviated sublimation step which leaves solid residue in the narrow trench. The remaining solid residue inhibits etch progress in the narrow trench during the second dry etch cycle allowing the etch in the wide trench to overtake the etch in the narrow trench.

摘要翻译： 描述了从窄沟槽和宽沟槽（或开放区域）中蚀刻氧化硅的方法，其允许宽沟槽中的蚀刻比窄沟槽中的蚀刻进一步进行。 该方法包括两个干蚀刻循环。 第一干蚀刻循环涉及低强度或缩写升华步骤，其在窄沟槽中留下固体残留物。 剩余的固体残余物在第二干蚀刻循环期间抑制窄沟槽中的蚀刻进程，允许宽沟槽中的蚀刻超过窄沟槽中的蚀刻。

公开(公告)号：US20070281496A1

公开(公告)日：2007-12-06

申请号：US11754440

申请日：2007-05-29

申请人： Nitin Ingle ,  Zheng Yuan ,  Paul Gee ,  Kedar Sapre

发明人： Nitin Ingle ,  Zheng Yuan ,  Paul Gee ,  Kedar Sapre

IPC分类号： H01L21/31

CPC分类号： C23C16/401 ,  C23C16/452 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31612

摘要： Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.

摘要翻译： 描述了在衬底上沉积氧化硅层的方法。 所述方法可以包括以下步骤：向沉积室提供衬底，在沉积室外产生原子氧前体，以及将原子氧前体引入室中。 所述方法还可以包括将硅前体引入沉积室，其中硅前体和原子氧前体首先在室中混合。 硅前体和原子氧前体反应以在衬底上形成氧化硅层，并且沉积的氧化硅层可以退火。 还描述了在衬底上沉积氧化硅层的系统。

公开(公告)号：US20060148273A1

公开(公告)日：2006-07-06

申请号：US11367866

申请日：2006-03-03

申请人： Nitin Ingle ,  Xinyua Xia ,  Zheng Yuan

发明人： Nitin Ingle ,  Xinyua Xia ,  Zheng Yuan

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： C23C16/45523 ,  C23C16/045 ,  C23C16/401 ,  C23C16/402 ,  C23C16/45512 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76801 ,  Y10S438/958

摘要： Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality and favorable gap-filling properties. During a pre-deposition gas flow stabilization phase and an initial deposition stage, a relatively low ratio of silicon-containing gas:oxidant deposition gas is flowed, resulting in formation of highly conformal silicon oxide at relatively slow rates. Over the course of the deposition process step, the ratio of silicon-containing gas:oxidant gas is increased, resulting in formation of less-conformal oxide material at relatively rapid rates during later stages of the deposition process step.

公开(公告)号：US20050142895A1

公开(公告)日：2005-06-30

申请号：US11018381

申请日：2004-12-20

申请人： Nitin Ingle ,  Shan Wong ,  Xinyun Xia ,  Vikash Banthia ,  Won Bang ,  Yen-Kun Wang ,  Zheng Yuan

发明人： Nitin Ingle ,  Shan Wong ,  Xinyun Xia ,  Vikash Banthia ,  Won Bang ,  Yen-Kun Wang ,  Zheng Yuan

IPC分类号： C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  C23C16/52 ,  C23C16/00 ,  H01L21/31 ,  H01L21/469

CPC分类号： C23C16/45512 ,  C23C16/401 ,  C23C16/45523 ,  C23C16/52

摘要： A method to form a silicon oxide layer, where the method includes the step of providing a continuous flow of a silicon-containing precursor to a chamber housing a substrate, where the silicon-containing precursor is selected from TMOS, TEOS, OMTS, OMCTS, and TOMCATS. The method may also include the steps of providing a flow of an oxidizing precursor to the chamber, and causing a reaction between the silicon-containing precursor and the oxidizing precursor to form a silicon oxide layer. The method may further include varying over time a ratio of the silicon-containing precursor:oxidizing precursor flowed into the chamber to alter a rate of deposition of the silicon oxide on the substrate.

摘要翻译： 一种形成氧化硅层的方法，其中该方法包括提供含硅前体连续流入容纳衬底的室的步骤，其中含硅前体选自TMOS，TEOS，OMTS，OMCTS， 和TOMCATS。 该方法还可以包括以下步骤：向室提供氧化前体流，并使含硅前体和氧化前体之间的反应形成氧化硅层。 该方法可以进一步包括随着时间的推移改变硅含量的前体：氧化前体流入室中以改变氧化硅在衬底上的沉积速率。