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    Method of inducing stresses in the channel region of a transistor
    1.
    发明授权
    Method of inducing stresses in the channel region of a transistor 失效
    在晶体管的沟道区域中产生应力的方法

    公开(公告)号：US07528051B2

    公开(公告)日：2009-05-05

    申请号：US10846734

    申请日：2004-05-14

    申请人： Reza Arghavani ,  Zheng Yuan ,  Ellie Y. Yieh ,  Shankar Venkataraman ,  Nitin K. Ingle

    发明人： Reza Arghavani ,  Zheng Yuan ,  Ellie Y. Yieh ,  Shankar Venkataraman ,  Nitin K. Ingle

    IPC分类号： H01L21/76

    CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7846

    摘要： A method of fabricating a semiconductor device, where the method includes forming a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.

    摘要翻译： 一种制造半导体器件的方法，其中所述方法包括在衬底上形成晶体管，其中所述晶体管包括被配置为在源极区域和漏极区域之间传导电荷的沟道区域，形成与所述晶体管相邻的沟槽， 在衬底上和沟槽内，并对材料进行退火，其中材料在退火之后是拉伸的，并且在沟道区域中产生拉伸应力。 另外，在半导体器件中形成沟槽隔离的方法，其中所述方法包括在衬底中形成沟槽，以较低的沉积速率在沟槽内形成材料，在衬底上以更高的沉积速率在衬底上形成材料 在沟槽内沉积材料并退火材料，其中在退火之后，沟槽中的材料是拉伸的。

    Method of inducing stresses in the channel region of a transistor
    6.
    发明申请
    Method of inducing stresses in the channel region of a transistor 失效
    在晶体管的沟道区域中产生应力的方法

    公开(公告)号：US20050255667A1

    公开(公告)日：2005-11-17

    申请号：US10846734

    申请日：2004-05-14

    申请人： Reza Arghavani ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkataraman ,  Nitin Ingle

    发明人： Reza Arghavani ,  Zheng Yuan ,  Ellie Yieh ,  Shankar Venkataraman ,  Nitin Ingle

    IPC分类号： H01L21/336 ,  H01L21/76 ,  H01L21/8238 ,  H01L29/00 ,  H01L29/78

    CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7846

    摘要： A method of fabricating a semiconductor device, where the method includes forming on a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.

    摘要翻译： 一种制造半导体器件的方法，其中所述方法包括在衬底上的晶体管上形成晶体管，其中所述晶体管包括被配置为在源极区域和漏极区域之间导电的沟道区域，形成与所述晶体管相邻的沟槽， 材料在衬底上并在沟槽内，并退火材料，其中材料在退火之后是拉伸的，并且在沟道区域中产生拉伸应力。 另外，在半导体器件中形成沟槽隔离的方法，其中所述方法包括在衬底中形成沟槽，以较低的沉积速率在沟槽内形成材料，在衬底上以更高的沉积速率在衬底上形成材料 在沟槽内沉积材料并退火材料，其中在退火之后，沟槽中的材料是拉伸的。

    Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
    7.
    发明授权
    Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill 有权
    TEOS /臭氧CVD的一氧化二氮退火以改善间隙填料

    公开(公告)号：US07141483B2

    公开(公告)日：2006-11-28

    申请号：US10757771

    申请日：2004-01-14

    申请人： Zheng Yuan ,  Reza Arghavani ,  Shankar Venkataraman

    发明人： Zheng Yuan ,  Reza Arghavani ,  Shankar Venkataraman

    IPC分类号： H01L21/76 ,  H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/31612 ,  C23C16/045 ,  C23C16/401 ,  C23C16/402 ,  C23C16/45512 ,  C23C16/45523 ,  C23C16/52 ,  C23C16/56 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02312 ,  H01L21/76224 ,  H01L21/76822 ,  H01L21/76828 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of filling a gap defined by adjacent raised features on a substrate includes providing a flow of a silicon-containing processing gas to a chamber housing the substrate and providing a flow of an oxidizing gas to the chamber. The method also includes depositing a first portion of a film as a substantially conformal layer in the gap by causing a reaction between the silicon-containing processing gas and the oxidizing gas. Depositing the conformal layer includes varying over time a ratio of the (silicon-containing processing gas):(oxidizing gas) and regulating the chamber to a pressure in a range from about 200 torr to about 760 torr throughout deposition of the conformal layer. The method also includes depositing a second portion of the film as a bulk layer. Depositing a second portion of the film includes maintaining the ratio of the (silicon-containing processing gas):(oxidizing gas) substantially constant throughout deposition of the bulk layer and regulating the chamber to a pressure in a range from about 200 torr to about 760 torr throughout deposition of the bulk layer. The method also includes exposing the substrate to nitrous oxide at a temperature less than about 900° C. to anneal the deposited film.

    摘要翻译： 填充由衬底上的相邻凸起特征限定的间隙的方法包括提供含硅处理气体流到容纳衬底并且向腔室提供氧化气体流的腔室。 该方法还包括通过引起含硅处理气体和氧化气体之间的反应，将膜的第一部分沉积在间隙中作为基本上共形的层。 沉积保形层包括随着时间的推移，在沉积共形层的过程中，（含硅处理气体）:(氧化气体）的比例和室的调节范围为约200托至约760托的压力。 该方法还包括将膜的第二部分沉积为本体层。 沉积薄膜的第二部分包括在沉积主体层期间保持（含硅处理气体）:(氧化气体）的比例基本上恒定，并将室调节到约200托至约760的范围内的压力 托盘在整个堆积层的沉积中。 该方法还包括在小于约900℃的温度下将衬底暴露于一氧化二氮以使沉积的膜退火。

    Semiconductor on insulator
    9.
    发明授权
    Semiconductor on insulator 有权
    半导体绝缘体

    公开(公告)号：US08173495B2

    公开(公告)日：2012-05-08

    申请号：US12911649

    申请日：2010-10-25

    申请人： Been-Yih Jin ,  Reza Arghavani ,  Robert Chau

    发明人： Been-Yih Jin ,  Reza Arghavani ,  Robert Chau

    IPC分类号： H01L21/00

    CPC分类号： H01L21/02488 ,  H01L21/02532 ,  H01L21/7624 ,  H01L21/76254 ,  H01L21/76256

    摘要： A method and apparatus for producing a relatively thin, relatively uniform semiconductor layer which has improved carrier mobility. In an embodiment, a lattice-matched insulator layer is formed on a semiconductor substrate, and a lattice-matched semiconductor layer is formed on the insulator layer to form a relatively thin, relatively uniform semiconductor on insulator apparatus. In embodiments of the method and apparatus, energy band characteristics may be used to facilitate the extraction of the well-region minority carriers.

    摘要翻译： 一种用于制造具有改善的载流子迁移率的相对薄的相对均匀的半导体层的方法和装置。 在一个实施例中，在半导体衬底上形成晶格匹配的绝缘体层，并且在绝缘体层上形成晶格匹配的半导体层，以形成相对薄的相对均匀的半导体绝缘体设备。 在该方法和装置的实施例中，可以使用能带特征来促进提取良好区域的少数载流子。

    Semiconductor on insulator apparatus
    10.
    发明授权
    Semiconductor on insulator apparatus 有权
    绝缘体半导体器件

    公开(公告)号：US07875932B2

    公开(公告)日：2011-01-25

    申请号：US12581794

    申请日：2009-10-19

    申请人： Been-Yih Jin ,  Reza Arghavani ,  Robert Chau

    发明人： Been-Yih Jin ,  Reza Arghavani ,  Robert Chau

    IPC分类号： H01L27/01

    CPC分类号： H01L21/02488 ,  H01L21/02532 ,  H01L21/7624 ,  H01L21/76254 ,  H01L21/76256

    摘要： A method and apparatus for producing a relatively thin, relatively uniform semiconductor layer which has improved carrier mobility. In an embodiment, a lattice-matched insulator layer is formed on a semiconductor substrate, and a lattice-matched semiconductor layer is formed on the insulator layer to form a relatively thin, relatively uniform semiconductor on insulator apparatus. In embodiments of the method and apparatus, energy band characteristics may be used to facilitate the extraction of the well-region minority carriers.

    摘要翻译： 一种用于制造具有改善的载流子迁移率的相对薄的相对均匀的半导体层的方法和装置。 在一个实施例中，在半导体衬底上形成晶格匹配的绝缘体层，并且在绝缘体层上形成晶格匹配的半导体层，以形成相对薄的相对均匀的半导体绝缘体设备。 在该方法和装置的实施例中，可以使用能带特征来促进提取良好区域的少数载流子。