公开(公告)号：US20060246704A1

公开(公告)日：2006-11-02

申请号：US11116571

申请日：2005-04-27

申请人： John Yan ,  Yong Du ,  Bruce Symons

发明人： John Yan ,  Yong Du ,  Bruce Symons

IPC分类号： H01L21/44 ,  H01L21/00

CPC分类号： H01L25/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A multi-chip module and a method for manufacturing the multi-chip module. A first semiconductor chip is mounted to a support substrate and a second semiconductor chip is mounted to the first semiconductor chip. The second semiconductor chip has a smaller dimension than the first semiconductor chip. A spacer is coupled to the second semiconductor chip. Bonding pads on the first and second semiconductor chips are wirebonded to bonding pads on the support substrate. A third semiconductor chip is mounted to the spacer and bonding pads on the third semiconductor chip are wirebonded to bonding pads on the support substrate.

摘要翻译： 一种多芯片模块及其制造方法。 第一半导体芯片安装在支撑基板上，第二半导体芯片安装在第一半导体芯片上。 第二半导体芯片的尺寸比第一半导体芯片小。 间隔件耦合到第二半导体芯片。 第一和第二半导体芯片上的接合焊盘被引线键合到支撑衬底上的接合焊盘。 第三半导体芯片安装到间隔件上，并且第三半导体芯片上的接合焊盘被引线接合到支撑衬底上的接合焊盘。

公开(公告)号：US07163839B2

公开(公告)日：2007-01-16

申请号：US11116571

申请日：2005-04-27

申请人： John Yan ,  Yong Du ,  Bruce E. Symons

发明人： John Yan ,  Yong Du ,  Bruce E. Symons

IPC分类号： H01L21/44

CPC分类号： H01L25/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A multi-chip module and a method for manufacturing the multi-chip module. A first semiconductor chip is mounted to a support substrate and a second semiconductor chip is mounted to the first semiconductor chip. The second semiconductor chip has a smaller dimension than the first semiconductor chip. A spacer is coupled to the second semiconductor chip. Bonding pads on the first and second semiconductor chips are wirebonded to bonding pads on the support substrate. A third semiconductor chip is mounted to the spacer and bonding pads on the third semiconductor chip are wirebonded to bonding pads on the support substrate.

摘要翻译： 一种多芯片模块及其制造方法。 第一半导体芯片安装在支撑基板上，第二半导体芯片安装在第一半导体芯片上。 第二半导体芯片的尺寸比第一半导体芯片小。 间隔件耦合到第二半导体芯片。 第一和第二半导体芯片上的接合焊盘被引线键合到支撑衬底上的接合焊盘。 第三半导体芯片安装到间隔件上，并且第三半导体芯片上的接合焊盘被引线接合到支撑衬底上的接合焊盘。

公开(公告)号：US20090289101A1

公开(公告)日：2009-11-26

申请号：US12126600

申请日：2008-05-23

申请人： Yong Du ,  John Yan ,  Niranjan Vijayaragavan

发明人： Yong Du ,  John Yan ,  Niranjan Vijayaragavan

IPC分类号： B23K31/02

CPC分类号： H05K3/3436 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K2201/09136 ,  H05K2201/10734 ,  H05K2203/159 ,  Y02P70/613

摘要： A method is provided for solder reflow which includes the steps of providing a receptacle having receptacle pads formed on an upper surface and placing a component on the receptacle, the component having a ball grid array of solder balls attached thereto. The component is placed on the receptacle in a manner which aligns the solder balls with the receptacle pads on the receptacle. The method further includes the steps of placing a weight having a predetermined size and a predetermined mass on top of the component to form a stack of the receptacle, the component and the weight, and reflowing the stack to attach the component to the receptacle by exposing the stack to high temperature to reflow the solder balls.

摘要翻译： 提供了一种用于焊料回流的方法，其包括以下步骤：提供具有形成在上表面上的插座衬垫并将部件放置在插座上的插座，该组件具有附接到其上的焊球的球栅阵列。 将组件以将焊球与插座上的插座垫对准的方式放置在插座上。 该方法还包括以下步骤：将具有预定尺寸和预定质量的重物放置在部件的顶部上以形成容器，部件和重物的堆叠，以及回流堆叠，以通过暴露来将部件附接到容器 堆叠到高温回流焊球。

公开(公告)号：US08324716B2

公开(公告)日：2012-12-04

申请号：US12720547

申请日：2010-03-09

申请人： Yong Du ,  John Yan

发明人： Yong Du ,  John Yan

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06575

摘要： A method and apparatus are provided for multi-chip packaging. A multi-chip package (100) includes a substrate (105) and a plurality of semiconductor dice (110, 120, 130). A first semiconductor die (110) is physically coupled to an upper face of the substrate (105), the first semiconductor die (110) being a smallest one of the plurality of semiconductor dice (110, 120, 130).

摘要翻译： 提供了用于多芯片封装的方法和装置。 多芯片封装（100）包括基板（105）和多个半导体晶片（110,120,130）。 第一半导体管芯（110）物理耦合到衬底（105）的上表面，第一半导体管芯（110）是多个半导体管芯（110,120,130）中的最小的一个。

公开(公告)号：US07691668B2

公开(公告)日：2010-04-06

申请号：US11612992

申请日：2006-12-19

申请人： Yong Du ,  John Yan

发明人： Yong Du ,  John Yan

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06575

摘要： A method and apparatus are provided for multi-chip packaging. A multi-chip package (100) includes a substrate (105) and a plurality of semiconductor dice (110, 120, 130). A first semiconductor die (110) is physically coupled to an upper face of the substrate (105), the first semiconductor die (110) being a smallest one of the plurality of semiconductor dice (110, 120, 130).

摘要翻译： 提供了用于多芯片封装的方法和装置。 多芯片封装（100）包括基板（105）和多个半导体晶片（110,120,130）。 第一半导体管芯（110）物理耦合到衬底（105）的上表面，第一半导体管芯（110）是多个半导体管芯（110,120,130）中的最小的一个。

公开(公告)号：US20080142942A1

公开(公告)日：2008-06-19

申请号：US11612992

申请日：2006-12-19

申请人： Yong Du ,  John Yan

发明人： Yong Du ,  John Yan

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L25/50 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06575

摘要： A method and apparatus are provided for multi-chip packaging. A multi-chip package (100) includes a substrate (105) and a plurality of semiconductor dice (110, 120, 130). A first semiconductor die (110) is physically coupled to an upper face of the substrate (105), the first semiconductor die (110) being a smallest one of the plurality of semiconductor dice (110, 120, 130).

摘要翻译： 提供了用于多芯片封装的方法和装置。 多芯片封装（100）包括基板（105）和多个半导体晶片（110,120,130）。 第一半导体管芯（110）物理耦合到衬底（105）的上表面，第一半导体管芯（110）是多个半导体管芯（110,120,130）中的最小的一个。

公开(公告)号：US07923349B2

公开(公告)日：2011-04-12

申请号：US12142589

申请日：2008-06-19

申请人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, Jr. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

发明人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, Jr. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

IPC分类号： H01L21/46 ,  H01L21/78 ,  H01L21/301

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3185 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

摘要： An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).

摘要翻译： 至少在晶片加工过程中至少施加电绝缘保形涂层至模具的活性（前）侧和一个或多个侧壁。 此外，模具具有至少施加到活性（前）侧和侧壁的电绝缘保形涂层。 此外，组件包括这种模具的叠层，电互连的模 - 芯; 并且组件包括这种管芯或这种管芯的堆叠，电连接到下面的电路（例如在基板或电路板中）。

公开(公告)号：US20100099145A1

公开(公告)日：2010-04-22

申请号：US12555742

申请日：2009-09-08

申请人： Haitao WANG ,  Chungsheng Mao ,  Jizhi Li ,  Jing XU ,  Rui ZHANG ,  Ling Wang ,  Yong Du ,  Longbin LIU

发明人： Haitao WANG ,  Chungsheng Mao ,  Jizhi Li ,  Jing XU ,  Rui ZHANG ,  Ling Wang ,  Yong Du ,  Longbin LIU

IPC分类号： C12P21/00 ,  C07H21/04 ,  C12N5/16

CPC分类号： C07K14/505 ,  A61K9/0019 ,  A61K38/00 ,  A61K47/6811 ,  C07K2317/53 ,  C07K2319/30

摘要： A recombinant fusion protein comprising a human erythropoietin peptide portion linked to an immunoglobulin peptide portion is described. The fusion protein has a prolonged half-life in vivo in comparison to naturally occurring or recombinant native human erythropoietin. In one embodiment of the invention, the protein has a half-life in vivo at least three fold higher than native human erythropoietin. The fusion protein also exhibits enhanced erythropoietic bioactivity in comparison to native human erythropoietin. In one embodiment, the fusion protein comprises the complete peptide sequence of a human erythropoietin (EPO) molecule and the peptide sequence of an Fc fragment of human immunoglobulin IgG1. The Fc fragment in the fusion protein includes the hinge region, CH2 and CH3 domains of human immunoglobulin IgG1. The EPO molecule may be linked directly to the Fc fragment to avoid extraneous peptide linkers and lessen the risk of an immunogenic response when administered in vivo. In one embodiment the hinge region is a human Fc fragment variant having a non-cysteine residue at amino acid 6. The invention also relates to nucleic acid and amino acid sequences encoding the fusion protein and transfected cell lines and methods for producing the fusion protein. The invention further includes pharmaceutical compositions comprising the fusion protein and methods of using the fusion protein and/or the pharmaceutical compositions, for example to stimulate erythropoiesis in subjects in need of therapy.

公开(公告)号：US08425895B2

公开(公告)日：2013-04-23

申请号：US12665682

申请日：2007-06-22

申请人： Haitao Wang ,  Chunsheng Mao ,  Jizhi Li ,  Ling Wang ,  Yong Du ,  Longbin Liu ,  Jing Xu ,  Rui Zhang

发明人： Haitao Wang ,  Chunsheng Mao ,  Jizhi Li ,  Ling Wang ,  Yong Du ,  Longbin Liu ,  Jing Xu ,  Rui Zhang

IPC分类号： A61K38/21 ,  C07K14/00 ,  C08H1/02 ,  C12P21/04 ,  C07H21/04 ,  A61K38/00

CPC分类号： C07K14/56 ,  A61K38/00 ,  C07K14/555

摘要： This application relates to recombinant human interferon-like proteins. In one embodiment a recombinant protein created by gene shuffling technology is described having enhanced anti-viral and anti-proliferative activities in comparison to naturally occurring human interferon alpha 2b (HuIFN-α2b). The invention encompasses a polynucleotide encoding the protein and recombinant vectors and host cells comprising the polynucleotide. Preferably the polynucleotide is selected from the group of polynucleotides each having a sequence at least 93% identical to SEQ ID: No. 1 and the protein is selected from the group of proteins each having an amino acid sequence at least 85% identical to SEQ ID NO: 2. The proteins and compositions comprising the proteins can be used for treatment of conditions responsive to interferon therapy, such as viral diseases and cancer.

摘要翻译： 本申请涉及重组人类干扰素样蛋白。 在一个实施方案中，与天然存在的人干扰素α2b（HuIFN-α2b）相比，描述了通过基因改组技术产生的重组蛋白质具有增强的抗病毒和抗增殖活性。 本发明包括编码蛋白质的多核苷酸和包含多核苷酸的重组载体和宿主细胞。 优选地，多核苷酸选自各自具有与SEQ ID：No.1至少93％相同的序列的多核苷酸，并且所述蛋白质选自蛋白质组，其各自具有与SEQ ID NO：至少85％相同的氨基酸序列 包含蛋白质的蛋白质和组合物可用于治疗对干扰素治疗（例如病毒性疾病和癌症）有反应的病症。

公开(公告)号：US08023587B2

公开(公告)日：2011-09-20

申请号：US11945168

申请日：2007-11-26

申请人： Jiefeng Deng ,  Erni Zhu ,  Yong Du

发明人： Jiefeng Deng ,  Erni Zhu ,  Yong Du

IPC分类号： H04K1/02

CPC分类号： H03F1/3247 ,  H03F1/3241 ,  H04B2001/0425

摘要： A device and method for pre-distorting a base-band digital signal. The device includes an adaptive parameter calculation unit and a pre-distorter. The adaptive parameter calculation unit is adapted to calculate nonlinear filter parameters in accordance with samples of a base-band digital signal and a feedback signal of a radio frequency channel, and output a calculation result to the pre-distorter. The pre-distorter is adapted to store and update the nonlinear filter parameters, perform power statistics of the base-band digital signal, select nonlinear filter parameters corresponding to a result of the power statistics, pre-distort the base-band digital signal, and output the pre-distorted base-band digital signal. With the method, the non-linearity of a power amplifier may be improved, different non-linearity inverse models may be selected according to different input signals and power amplifier characteristics, and the efficiency of a base station transmitter may be improved.

摘要翻译： 用于预失真基带数字信号的装置和方法。 该装置包括自适应参数计算单元和预失真器。 自适应参数计算单元适于根据基带数字信号和射频信道的反馈信号的采样来计算非线性滤波器参数，并将计算结果输出到预失真器。 预失真器适于存储和更新非线性滤波器参数，执行基带数字信号的功率统计，选择对应于功率统计结果的非线性滤波器参数，对基带数字信号进行预失真，以及 输出预失真的基带数字信号。 利用该方法，可以提高功率放大器的非线性度，可以根据不同的输入信号和功率放大器特性选择不同的非线性逆模型，并且可以提高基站发射机的效率。