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1.发明授权Direct methanol fuel cell including a water recovery and re-circulation system and method of fabrication 有权直接甲醇燃料电池包括水回收和再循环系统及其制造方法公开(公告)号：US06727016B2
公开(公告)日：2004-04-27
申请号：US09925948
申请日：2001-08-09
IPC分类号： H01M804
CPC分类号： H01M8/1009 , H01M8/04097 , H01M8/04156 , H01M2300/0082 , Y02E60/523 , Y10T29/49108
摘要： A fuel cell device and method of forming the fuel cell device including a base portion having a major surface. At least one fuel cell membrane electrode assembly is formed on the major surface of the base portion. A water recovery and recirculation system is defined in a cap portion and in communication with a water recovery and recirculation channel defined in the base portion. The water recovery and recirculating system is formed to collect reaction water from the cathode side of the at least one fuel cell membrane electrode assembly for recirculation to the anode side of the fuel cell membrane electrode assembly. An exhaust separation chamber is defined in the base portion and communicating with the fuel cell membrane electrode assembly for the exhausting of generated gases.
摘要翻译： 一种形成燃料电池装置的燃料电池装置及其方法，所述燃料电池装置包括具有主表面的基部。 至少一个燃料电池膜电极组件形成在基部的主表面上。 水回收和再循环系统限定在盖部分中并且与在基部中限定的水回收和再循环通道连通。 水回收再循环系统形成为从至少一个燃料电池膜电极组件的阴极侧收集反应水，用于再循环到燃料电池膜电极组件的阳极侧。 排气分离室限定在基座部分中，并与燃料电池膜电极组件连通以排出产生的气体。
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公开(公告)号：US06677515B2
公开(公告)日：2004-01-13
申请号：US09928581
申请日：2001-08-13
申请人： Jun Wang , Daniel S. Marshall
发明人： Jun Wang , Daniel S. Marshall
IPC分类号： H01L3534
摘要： A thermoelectric material is disclosed that is manufactured from a method including the steps of: providing a Group IV element boride, and doping the Group IV element boride with a doping element chosen from one of the column III, IV, V elements, wherein the doping element is different from the Group IV element in the Group IV element boride, and the doping element is not boron. An alternate method of fabricating a thermoelectric material includes the steps of simultaneously growing on a substrate a Group IV element boride and at least one doping element chosen from one of the Group III, IV, or V elements wherein the doping element is different than the Group IV element in the Group IV element boride and the doping element is not boron.
摘要翻译： 公开了一种由包括以下步骤的方法制造的热电材料：提供IV族元素硼化物，并用选自III，IV，V族元素之一的掺杂元素掺杂IV族元素硼化物，其中掺杂 元素不同于IV族元素硼化物中的IV族元素，掺杂元素不是硼。 制造热电材料的替代方法包括以下步骤：在衬底上同时生长第IV族元素硼化物和选自III，IV或V族元素之一的至少一种掺杂元素，其中掺杂元素不同于组 IV族元素硼化物中的IV元素和掺杂元素不是硼。
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3.发明授权
公开(公告)号：US5767543A
公开(公告)日：1998-06-16
申请号：US714715
申请日：1996-09-16
IPC分类号： H01L21/02 , H01L21/285 , H01L21/314 , H01L21/316 , H01L29/51 , H01L29/788 , G11C11/22
CPC分类号： H01L28/56 , H01L21/2855 , H01L21/28556 , H01L21/31691 , H01L29/516
摘要： A layered bismuth ferroelectric structure (12) and a method for forming the bismuth layered ferroelectric structure (12). A monolayer (12A) of bismuth is formed in intimate contact with a single crystalline semiconductor material (11). A layered ferroelectric material (12) is grown on the monolayer (12A) of bismuth such that the monolayer (12A) of bismuth becomes a part of the layered ferroelectric material (12). The ferroelectric material (12) forms a layered ferroelectric material which is not a pure perovskite, wherein the crystalline structure at the interface between the single crystalline semiconductor material (11) and the monolayer (12A) of bismuth are substantially the same.
摘要翻译： 层状铋强电介质结构（12）和形成铋层状铁电体结构（12）的方法。 形成与单晶半导体材料（11）紧密接触的铋单层（12A）。 在铋的单层（12A）上生长分层的铁电材料（12），使得铋的单层（12A）成为层状铁电体（12）的一部分。 铁电材料（12）形成不是纯钙钛矿的层状铁电体材料，其中在单晶半导体材料（11）和铋单层（12A）之间的界面处的晶体结构基本上相同。
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公开(公告)号：US06262461B1
公开(公告)日：2001-07-17
申请号：US09102105
申请日：1998-06-22
IPC分类号： H01L31119
CPC分类号： H01L29/66568 , H01L29/4975 , H01L29/517 , H01L29/78 , H01L29/7838
摘要： A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.
摘要翻译： 一种制造场效应晶体管的方法，包括在邻近表面的半导体衬底结构中掺杂连续覆盖层，以包括与源极区域间隔开的源极区域和漏极区域。 高介电常数绝缘体层位于覆盖连续覆盖层的半导体衬底结构的表面上，以限定源区和漏区之间的栅极区。 选择绝缘体层上的栅极接触以提供消耗绝缘体层下方的掺杂层的功函数差异。 此外，掺杂层深度和剂量被设计成使得掺杂层通过栅极接触和半导体衬底的选择的功函数差耗尽在绝缘体层之下。
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公开(公告)号：US6025735A
公开(公告)日：2000-02-15
申请号：US772735
申请日：1996-12-23
IPC分类号： H03K19/173
CPC分类号： H03K19/17772 , H03K19/1736 , H03K19/17748 , H03K19/17756
摘要： A switch network (22) in a Field Programmable Gate Array (FPGA) which operates as a combination of a programming transistor (34) and a ferroelectric transistor (32). The programming transistor (34) is selected to transfer a polarizing voltage to a gate terminal of the ferroelectric transistor (32) for programming the ferroelectric transistor (32) in an on-state. The ferroelectric transistor (32) functions as a nonvolatile latch and pass device to provide the electrical interconnect path that links multiple Configurable Logic Blocks (CLBs). The programming transistor (34) is selected to transfer a depolarizing voltage to the gate terminal of the ferroelectric transistor (32) for programming the ferroelectric transistor (32) in an off-state.
摘要翻译： 现场可编程门阵列（FPGA）中的开关网络（22），其作为编程晶体管（34）和铁电晶体管（32）的组合工作。 编程晶体管（34）被选择为将极化电压传递到铁电晶体管（32）的栅极端子，用于将铁电晶体管（32）编程为导通状态。 铁电晶体管（32）用作非易失性锁存和通过装置，以提供链接多个可配置逻辑块（CLB）的电互连路径。 编程晶体管（34）被选择为将去极化电压传递到铁电晶体管（32）的栅极端子，用于将铁电晶体管（32）编程为截止状态。
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公开(公告)号：US5886920A
公开(公告)日：1999-03-23
申请号：US982175
申请日：1997-12-01
CPC分类号： G11C11/22 , G11C11/223
摘要： A variable conducting element (10) and method for programming a constant current or constant resistance provided at output terminals (24 and 26) of a ferroelectric transistor (12). The ferroelectric transistor (12) has portions of a ferroelectric material (32A) programmed having up-polarization states separated by domain walls (34) from portions of a ferroelectric material (32B) programmed having down-polarization states. The portion of the ferroelectric material (32A) programmed in the up-polarization state forms current conduction channels between a source region (23) and a drain region (25) of the ferroelectric transistor (12). The ferroelectric transistor (12) is programmed through a capacitor (14) to adjust the charge supplied to a control terminal (22) of the ferroelectric transistor (12).
摘要翻译： 一种用于编程在铁电晶体管（12）的输出端（24和26）处提供的恒定电流或恒定电阻的可变导体元件（10）和方法。 铁电晶体管（12）具有编程具有由畴壁（34）与被编程为具有向下极化状态的铁电材料（32B）的部分分离的上极化状态的铁电材料（32A）的部分。 以上极化状态编程的铁电材料（32A）的部分在铁电晶体管（12）的源极区（23）和漏极区（25）之间形成电流传导沟道。 铁电晶体管（12）通过电容器（14）编程，以调节提供给铁电晶体管（12）的控制端子（22）的电荷。
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7.发明授权Method for growing a monocrystalline oxide layer and for fabricating a semiconductor device on a monocrystalline substrate 有权用于生长单晶氧化物层和用于在单晶衬底上制造半导体器件的方法公开(公告)号：US06916717B2
公开(公告)日：2005-07-12
申请号：US10137383
申请日：2002-05-03
申请人： Hao Li , Ravindranath Droopad , Daniel S. Marshall , Yi Wei , Xiao M. Hu , Yong Liang
发明人： Hao Li , Ravindranath Droopad , Daniel S. Marshall , Yi Wei , Xiao M. Hu , Yong Liang
IPC分类号： H01L33/00 , C30B25/18 , H01L21/20 , H01L21/205 , H01L21/316 , H01L31/10 , H01S5/026 , H01L21/336
CPC分类号： C30B25/18 , H01L21/02271 , H01L21/02318 , H01L21/02381 , H01L21/02488 , H01L21/02505 , H01L21/02513 , H01L21/02521 , H01L21/31604 , H01L21/31691
摘要： High quality monocrystalline metal oxide layers are grown on a monocrystalline substrate such as a silicon wafer. The monocrystalline metal oxide is grown on the silicon substrate at a temperature low enough to prevent deleterious and simultaneous oxidation of the silicon substrate. After a layer of 1-3 monolayers of the monocrystalline oxide is grown, the growth is stopped and the crystal quality of that layer is improved by a higher temperature anneal. Following the anneal, the thickness of the layer can be increased by restarting the low temperature growth. An amorphous silicon oxide layer can be grown at the interface between the monocrystalline metal oxide layer and the silicon substrate after the thickness of the monocrystalline oxide reaches a few monolayers.
摘要翻译： 高品质单晶金属氧化物层生长在诸如硅晶片的单晶衬底上。 在硅衬底上生长单晶金属氧化物，其温度足够低以防止硅衬底的有害和同时的氧化。 在生长单层氧化物的1-3层单层之后，停止生长，并且通过较高温度退火来改善该层的晶体质量。 退火后，通过重新开始低温生长可以提高层的厚度。 在单晶氧化物的厚度达到几个单层之后，可以在单晶金属氧化物层和硅衬底之间的界面处生长非晶氧化硅层。
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8.发明授权Thermoelectric power generator and method of generating thermoelectric power in a steam power cycle utilizing latent steam heat 失效热电发电机及利用潜热蒸汽在蒸汽动力循环中产生热电功率的方法公开(公告)号：US06367261B1
公开(公告)日：2002-04-09
申请号：US09703072
申请日：2000-10-30
IPC分类号： F01K1700
摘要： A thermoelectric power generator and method of generating thermoelectric power in a steam power cycle utilizing latent steam heat including a condenser, a heat source, such as steam, and at least one thermoelectric module. The condenser includes a plurality of condenser tubes each having included therein a heat extractor. The heat source is in communication with the condenser and is characterized as providing thermal energy to the condenser. The at least one thermoelectric module, including a plurality of thermoelectric elements, is positioned in communication with at least one of the plurality of condenser tubes so that thermal energy flows through the thermoelectric elements thereby generating electrical power.
摘要翻译： 一种热电发电机和利用包括冷凝器，热源（例如蒸汽）和至少一个热电模块的潜热蒸汽热在蒸汽动力循环中产生热电功率的方法。 冷凝器包括多个冷凝管，每个冷凝管每个都包括一个散热器。 热源与冷凝器连通，其特征在于向冷凝器提供热能。 包括多个热电元件的至少一个热电模块被定位成与多个冷凝器管中的至少一个连通，使得热能流过热电元件从而产生电力。
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9.发明授权
公开(公告)号：US6097047A
公开(公告)日：2000-08-01
申请号：US70063
申请日：1998-04-30
IPC分类号： H01L21/336 , H01L21/8234 , H01L29/10 , H01L29/78 , H01L29/786
CPC分类号： H01L29/66772 , H01L21/8234 , H01L29/1079 , H01L29/78391 , H01L29/78603 , H01L29/78645
摘要： A ferroelectric semiconductor device (10) and a method of manufacturing the ferroelectric semiconductor device (10). The ferroelectric semiconductor device (10) is manufactured from a substrate (11) that has a layer (14) of ferroelectric material sandwiched between a substrate (13) and a layer (16) of silicon. A gate structure (24) is formed on the layer (16) of silicon. A source region is formed in a portion of the layer (16) of silicon adjacent one side of the gate structure (24) and a drain region is formed in a portion of the layer (16) of silicon adjacent an opposing side of the gate structure (24).
摘要翻译： 铁电半导体器件（10）和制造铁电半导体器件（10）的方法。 铁电半导体装置（10）由具有夹在基板（13）和硅层（16）之间的铁电材料层（14）的基板（11）制成。 在硅的层（16）上形成栅极结构（24）。 源极区域形成在与栅极结构（24）的一侧相邻的硅的层（16）的一部分中，并且漏极区域形成在邻近栅极的相对侧的硅层（16）的一部分中 结构（24）。
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10.发明授权
公开(公告)号：US5898317A
公开(公告)日：1999-04-27
申请号：US772736
申请日：1996-12-23
IPC分类号： H03K19/177 , G06F7/38
CPC分类号： H03K19/17772 , H03K19/1776 , H03K19/1778
摘要： A ferroelectric memory array (20) monolithically integrated with a field programmable gate array (32) into a semiconductor circuit (10). The ferroelectric memory array (20) is suitable for a semiconductor manufacturer to program the configuration data that is used in the field programmable gate array (32) prior to shipment and installation in an electronic system. The memory array (20) provides the data that configures the field programmable gate array (32) for functionality of the Configurable Logic Blocks (CLBs) in the field programmable gate array (32). Should the field programmable gate array (32) circuit lose power, the non-volatile memory array (20) provides a shift register (26) with the data to reconfigure the field programmable gate array (32).
摘要翻译： 与现场可编程门阵列（32）单片集成到半导体电路（10）中的铁电存储器阵列（20）。 铁电存储器阵列（20）适用于半导体制造商，以在电子系统中装运和安装之前编程在现场可编程门阵列（32）中使用的配置数据。 存储器阵列（20）为现场可编程门阵列（32）中的可配置逻辑块（CLB）的功能提供配置现场可编程门阵列（32）的数据。 如果现场可编程门阵列（32）电路失去功率，则非易失性存储器阵列（20）为移位寄存器（26）提供数据以重新配置现场可编程门阵列（32）。
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