-
公开(公告)号：US11903205B2
公开(公告)日：2024-02-13
申请号：US17744571
申请日：2022-05-13
Applicant: Kioxia Corporation
Inventor： Masaru Kito , Hideaki Aochi , Ryota Katsumata , Akihiro Nitayama , Masaru Kidoh , Hiroyasu Tanaka , Yoshiaki Fukuzumi , Yasuyuki Matsuoka , Mitsuru Sato
IPC: H10B43/27 , H01L21/822 , H01L27/06 , H01L27/105 , H10B41/27 , H10B43/20 , H10B43/40 , H10B69/00 , G11C16/04
CPC classification number: H10B43/27 , H01L21/8221 , H01L27/0688 , H01L27/105 , H10B41/27 , H10B43/20 , H10B43/40 , H10B69/00 , G11C16/0483
Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
-
公开(公告)号：US11744075B2
公开(公告)日：2023-08-29
申请号：US17672819
申请日：2022-02-16
Applicant: Kioxia Corporation
Inventor： Yoshiaki Fukuzumi , Shinya Arai , Masaki Tsuji , Hideaki Aochi , Hiroyasu Tanaka
IPC: H10B43/27 , H01L29/66 , H01L29/792 , H10B43/10 , H10B43/50 , H01L29/423
CPC classification number: H10B43/27 , H01L29/42344 , H01L29/66833 , H01L29/7926 , H10B43/10 , H10B43/50
Abstract: A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.
-
公开(公告)号：US20230165009A1
公开(公告)日：2023-05-25
申请号：US18100613
申请日：2023-01-24
Applicant: Kioxia Corporation
Inventor： Yoshiaki FUKUZUMI , Hideaki Aochi
CPC classification number: H10B43/40 , H01L21/76898 , H01L21/185 , H01L24/80 , H01L25/18 , H10B43/27 , H10B43/30 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2225/06541
Abstract: According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.
-
公开(公告)号：US11574926B2
公开(公告)日：2023-02-07
申请号：US17499357
申请日：2021-10-12
Applicant: KIOXIA CORPORATION
Inventor： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Hideaki Aochi
IPC: G11C16/04 , H01L27/11582 , H01L27/11556 , H01L27/11573 , H01L27/11575 , H01L27/11578 , H01L27/105 , H01L29/51 , H01L27/11551
Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions a charge storage layer formed to surround the side surfaces of the columnar portions: and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.
-
公开(公告)号：US10916559B2
公开(公告)日：2021-02-09
申请号：US16245271
申请日：2019-01-11
Applicant: KIOXIA CORPORATION
Inventor： Masaru Kito , Hideaki Aochi , Ryota Katsumata , Akihiro Nitayama , Masaru Kidoh , Hiroyasu Tanaka , Yoshiaki Fukuzumi , Yasuyuki Matsuoka , Mitsuru Sato
IPC: H01L27/08 , H01L27/11582 , H01L21/822 , H01L27/06 , H01L27/105 , H01L27/115 , H01L27/11573 , H01L27/11578 , H01L27/11556 , G11C16/04
Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
-
Patent Agency Ranking
公开(公告)号：USRE50330E1
公开(公告)日：2025-03-04
申请号：US17850399
申请日：2022-06-27
Applicant: Kioxia Corporation
Inventor： Ryota Katsumata , Hideaki Aochi , Hiroyasu Tanaka , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.
-
公开(公告)号：US12089410B2
公开(公告)日：2024-09-10
申请号：US18348418
申请日：2023-07-07
Applicant: Kioxia Corporation
Inventor： Yoshiaki Fukuzumi , Shinya Arai , Masaki Tsuji , Hideaki Aochi , Hiroyasu Tanaka
IPC: H10B43/27 , H01L29/423 , H01L29/66 , H01L29/792 , H10B43/10 , H10B43/50
CPC classification number: H10B43/27 , H01L29/42344 , H01L29/66833 , H01L29/7926 , H10B43/10 , H10B43/50
Abstract: A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.
-
公开(公告)号：US11844218B2
公开(公告)日：2023-12-12
申请号：US17843320
申请日：2022-06-17
Applicant: KIOXIA CORPORATION
Inventor： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Hideaki Aochi
IPC: H01L29/51 , H10B43/27 , G11C16/04 , H10B41/27 , H10B43/20 , H10B43/40 , H10B43/50 , H10B99/00 , H10B41/20
CPC classification number: H10B43/27 , G11C16/0483 , H01L29/513 , H10B41/27 , H10B43/20 , H10B43/40 , H10B43/50 , H10B99/00 , H10B41/20
Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.
-
公开(公告)号：USRE49152E1
公开(公告)日：2022-07-26
申请号：US16926273
申请日：2020-07-10
Applicant: Kioxia Corporation
Inventor： Ryota Katsumata , Hideaki Aochi , Hiroyasu Tanaka , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
IPC: G11C11/14 , H01L27/11578 , G11C16/04 , G11C16/06 , H01L27/11565 , H01L27/11582
Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.
-
公开(公告)号：US11374021B2
公开(公告)日：2022-06-28
申请号：US17141534
申请日：2021-01-05
Applicant: Kioxia Corporation
Inventor： Masaru Kito , Hideaki Aochi , Ryota Katsumata , Akihiro Nitayama , Masaru Kidoh , Hiroyasu Tanaka , Yoshiaki Fukuzumi , Yasuyuki Matsuoka , Mitsuru Sato
IPC: H01L27/11 , H01L27/11582 , H01L21/822 , H01L27/06 , H01L27/105 , H01L27/115 , H01L27/11573 , H01L27/11578 , H01L27/11556 , G11C16/04
Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
-
-
-
-
-
-
-
-
-
Search Results
20
records
(took 0.017 seconds)
