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    MOS type dynamic random access memory
    7.
    发明授权
    MOS type dynamic random access memory 失效
    MOS型动态随机存取存储器

    公开(公告)号：US5049957A

    公开(公告)日：1991-09-17

    申请号：US528086

    申请日：1990-05-24

    申请人： Satoshi Inoue ,  Akihiro Nitayama ,  Kazumasa Sunouchi ,  Fumio Horiguchi

    发明人： Satoshi Inoue ,  Akihiro Nitayama ,  Kazumasa Sunouchi ,  Fumio Horiguchi

    IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

    CPC分类号： H01L27/10817

    摘要： In a semiconductor memory device, a storage node electrode having a cavity is provided such that the inner surface of a storage node electrode is used as a capacitor electrode. In a DRAM fabricating method, a storage node electrode having a cavity is formed by laminating a first conductor layer, an insulating film and a second conductor layer, which in turn are patterned into a desired shape, depositing a third conductor layer on the three-layer pattern, performing anisotropic etching so as to cause the third conductor layer to remain only on the side walls of the pattern to thereby form a box-shaped conductor, forming an opening in a part of the box-shaped conductor, removing the insulating film by an etching to thereby form a cavity.

    摘要翻译： 在半导体存储器件中，具有空腔的存储节点电极被设置为使得存储节点电极的内表面用作电容器电极。 在DRAM制造方法中，通过层叠第一导体层，绝缘膜和第二导体层来形成具有空腔的存储节点电极，第一导体层，绝缘膜和第二导体层又被图案化成所需形状， 层状图案，进行各向异性蚀刻，以使第三导体层仅保留在图案的侧壁上，从而形成盒状导体，在盒状导体的一部分中形成开口，去除绝缘膜 通过蚀刻从而形成空腔。

    Process for manufacturing a DRAM cell
    8.
    发明授权
    Process for manufacturing a DRAM cell 失效
    用于制造DRAM单元的工艺

    公开(公告)号：US5043298A

    公开(公告)日：1991-08-27

    申请号：US619666

    申请日：1990-11-28

    申请人： Takashi Yamada ,  Fumio Horiguchi ,  Satoshi Inoue ,  Akihiro Nitayama ,  Kazumasa Sunouchi

    发明人： Takashi Yamada ,  Fumio Horiguchi ,  Satoshi Inoue ,  Akihiro Nitayama ,  Kazumasa Sunouchi

    IPC分类号： H01L27/04 ,  H01L21/28 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/417

    CPC分类号： H01L27/10808

    摘要： When a semiconductor device having a multi-layered contact is fabaricated, the gate electrode is covered with a thick insulator film. A polycrystalline silicon film is formed in a state in which at least the gate electrode in the contact forming area is covered with a first oxidization-proof insulator film. An inter-layer insulator film is then formed in a state in which at least part of the polycrystalline silicon film is covered with a second oxidization-proof insulator film. A first contact hole is formed using the polycrystalline silicon film as an etching stopper, and the polycrystalline silicon film is then oxidized. Furthermore, a second contact hole is formed in the inter-layer insulator film on the upper surface of the second oxidization-proof insulator film using as the etching stopper the polycrystalline silicon film underlying the second oxidization-proof insulator film. Since the polycrystalline silicon film is formed under the inter-layer insulator film in the second contact forming area so as to cover the gate electrode, it acts as a stopper when the second contact is formed to thereby prevent a short circuit with the gate electrode even if there is no distance between the gate electrode and the second contact.

    摘要翻译： 当具有多层接触的半导体器件被制造时，栅电极被厚绝缘膜覆盖。 在至少形成接触形成区域中的栅电极被第一耐氧化绝缘膜覆盖的状态下形成多晶硅膜。 然后在至少部分多晶硅膜被第二防氧化绝缘膜覆盖的状态下形成层间绝缘膜。 使用多晶硅膜作为蚀刻阻挡层形成第一接触孔，然后将多晶硅膜氧化。 此外，在第二耐氧化绝缘膜的上表面上的层间绝缘膜中形成第二接触孔，使用作为蚀刻停止层的第二耐氧化绝缘膜的下面的多晶硅膜。 由于在第二接触形成区域中的层间绝缘体膜下方形成多晶硅膜以覆盖栅电极，所以当形成第二接触时，其作为阻挡体，从而防止栅电极的短路甚至 如果栅电极和第二触点之间没有距离。

    Method of making dynamic random access semiconductor memory device
    9.
    发明授权
    Method of making dynamic random access semiconductor memory device 失效
    制作动态随机存取半导体存储器件的方法

    公开(公告)号：US5350708A

    公开(公告)日：1994-09-27

    申请号：US77744

    申请日：1993-06-18

    申请人： Atsushi Yagishita ,  Katsuhiko Hieda ,  Akihiro Nitayama ,  Fumio Horiguchi

    发明人： Atsushi Yagishita ,  Katsuhiko Hieda ,  Akihiro Nitayama ,  Fumio Horiguchi

    IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/70

    CPC分类号： H01L27/10841 ,  H01L27/10823

    摘要： A groove, which runs vertically and horizontally, is formed in a substrate, thereby a plurality of silicon pillars are formed in a matrix manner. A field oxidation film is formed on the central portion of the groove. A drain diffusion layer is formed on the upper portion of each silicon pillar, and a source diffusion layer is formed on the bottom portion of the groove. A gate electrode, serving as a word line, a storage node contacting the source diffusion layer, and a cell plate are sequentially buried to enclose the surroundings of each silicon pillar, and a bit line is formed in an uppermost layer, thereby a DRAM cell array is structured.

    摘要翻译： 在衬底中形成垂直和水平延伸的槽，从而以矩阵形式形成多个硅柱。 在槽的中心部分形成场氧化膜。 在每个硅柱的上部形成漏极扩散层，在沟槽的底部形成有源极扩散层。 用作字线的栅电极，与源极扩散层接触的存储节点和单元板依次被埋置以包围每个硅柱的周围，并且在最上层形成位线，从而形成DRAM单元 阵列是结构化的

    Dynamic ram, having an improved large capacitance
    10.
    发明授权
    Dynamic ram, having an improved large capacitance 失效
    动态ram，具有改进的大电容

    公开(公告)号：US5138412A

    公开(公告)日：1992-08-11

    申请号：US636556

    申请日：1991-01-07

    申请人： Katsuhiko Hieda ,  Akihiro Nitayama ,  Fumio Horiguchi

    发明人： Katsuhiko Hieda ,  Akihiro Nitayama ,  Fumio Horiguchi

    IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

    CPC分类号： H01L27/10852 ,  H01L27/10817

    摘要： A dynamic RAM comprises a semiconductor substrate, first and second MOS transistor formed on said semiconductor substrate, each having a source, a drain, and a gate, a first insulation film formed on said first and second MOS transistors, a first electrode formed on said first insulation film, for accumulating an electrical charge, the first electrode extending through a first hole made in the first insulation film and connected to one of the source and drain of said first MOS transistor, a second electrode formed on the first insulation film, for accumulating an electrical charge, the second electrode extending through a second hole made in the first insulation film and connected to one of the source and drain of the second MOS transistor, and at least one part of the second electrode being spaced apart from, located above, and overlapping part of the first electrode, first and second capacitor-insulating films formed on the first and second electrodes, respectively, and a capacitor electrode fromed on the first and second capacitor-insulating films and having a portion interposed between the overlapping parts of the first and second electrodes.

    摘要翻译： 动态RAM包括形成在所述半导体衬底上的半导体衬底，每个具有源极，漏极和栅极的第一和第二MOS晶体管，形成在所述第一和第二MOS晶体管上的第一绝缘膜，形成在所述第一和第二MOS晶体管上的第一电极， 第一绝缘膜，用于累积电荷，所述第一电极延伸穿过由所述第一绝缘膜制成的第一孔并连接到所述第一MOS晶体管的源极和漏极中的一个，形成在所述第一绝缘膜上的第二电极，用于 累积电荷，所述第二电极延伸通过在所述第一绝缘膜中制成的第二孔并且连接到所述第二MOS晶体管的源极和漏极中的一个，并且所述第二电极的至少一部分与所述第二绝缘膜上的 以及分别形成在第一和第二电极上的第一电极，第一和第二电容器绝缘膜的重叠部分，以及电容器e 在第一和第二电容器绝缘膜上引导，并且具有插入在第一和第二电极的重叠部分之间的部分。