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    Flip-chip semiconductor package and package substrate applicable thereto
    1.
    发明申请
    Flip-chip semiconductor package and package substrate applicable thereto 审中-公开
    倒装芯片半导体封装和适用于其的封装基板

    公开(公告)号：US20080277802A1

    公开(公告)日：2008-11-13

    申请号：US12151904

    申请日：2008-05-08

    Applicant: Kuo-Ching Tsai ,  Chang-Fu Lin

    Inventor： Kuo-Ching Tsai ,  Chang-Fu Lin

    IPC: H01L23/488

    CPC classification number: H01L21/563 ,  H01L24/28 ,  H01L2224/13099 ,  H01L2224/14132 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83102 ,  H01L2224/83365 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

    Abstract: A flip-chip semiconductor package structure and a package substrate applicable thereto are disclosed. The package substrate includes a body having at least a chip-attach area disposed thereon; a plurality of solder pads disposed in the chip-attach area and arranged at different intervals; and a fluid-disturbing portion disposed in the chip-attach area at a position where the solder pads are loosely arranged. A flip-chip semiconductor chip is mounted on the solder pads via conductive bumps and an underfill material is filled between the package substrate and the flip-chip semiconductor chip, the underfill material encapsulating the conductive bumps and the fluid-disturbing portion. By protrudingly disposing the fluid-disturbing portion at a position where the conductive bumps are loosely arranged, that is, the conductive bumps having bigger intervals therebetween, gap between the package substrate and the flip-chip semiconductor chip can be reduced so as to increase capillary attraction generated by capillary phenomenon, thereby balancing flow rate of the underfill material between the conductive bumps that are arranged at different intervals and thus avoiding problems of void formation, subsequent popcorn effect or delamination as encountered in the prior art.

    Abstract translation: 公开了一种倒装芯片半导体封装结构和可应用于其的封装衬底。 封装基板包括：至少设置有芯片附着区域的主体; 多个焊盘，设置在芯片附着区域中并以不同的间隔布置; 以及布置在所述芯片附着区域中的焊料松散布置的位置处的流体干扰部分。 通过导电凸块将倒装芯片半导体芯片安装在焊盘上，并且在封装衬底和倒装芯片半导体芯片之间填充底部填充材料，封装有导电凸块和流体干扰部分的底部填充材料。 通过将导体凸块松动配置的位置突出地配置，即，导电性凸起间隔较大的间隙，可以减小封装基板与倒装芯片半导体芯片之间的间隙，从而增加毛细管 由毛细管现象产生的吸引力，从而平衡以不同间隔布置的导电凸块之间的底部填充材料的流速，从而避免了现有技术中遇到的空隙形成问题，随后的爆米花效应或分层现象。

    Semiconductor package that has electronic component and its fabrication method
    6.
    发明申请
    Semiconductor package that has electronic component and its fabrication method 审中-公开
    具有电子部件的半导体封装及其制造方法

    公开(公告)号：US20080251945A1

    公开(公告)日：2008-10-16

    申请号：US12082900

    申请日：2008-04-14

    Applicant: Chin-Te Chen ,  Kuo-Ching Tsai ,  Chung-Hsing Ko

    Inventor： Chin-Te Chen ,  Kuo-Ching Tsai ,  Chung-Hsing Ko

    IPC: H01L23/52 ,  H01L21/44

    CPC classification number: H05K3/3442 ,  H05K3/3484 ,  H05K2201/10636 ,  H05K2203/0545 ,  H05K2203/167 ,  Y02P70/611 ,  Y02P70/613

    Abstract: A semiconductor device having at least an electronic component and its fabrication method are disclosed. The fabrication method comprises: applying a conductive material on each one of at least a paired solder pads arranged on a substrate by screen printing, with a recess formed in the conductive material on each one of the at least a paired solder pads, so as to expose a portion of each one of the at least a paired solder pads, wherein the recesses on the at least a paired solder pads are formed in position corresponding to each other; and mounting at least an electronic component having two opposing conductive terminals on the at least a paired solder pads, in a manner that the two opposing conductive terminals are introduced into the corresponding recesses of the conductive material so as for the electronic component to be electrically connected to the at least a paired solder pads via the conductive material by reflow. The recesses of the conductive material are capable of effectively securing the electronic component in position. Furthermore, both terminals of the electronic component are not formed with conductive material underneath so as to prevent the electronic components from tilting in level resulted from the uniform applying of the conductive material.

    Abstract translation: 公开了至少具有电子部件的半导体器件及其制造方法。 制造方法包括：通过丝网印刷在布置在基板上的至少一个成对的焊盘中的每一个上的导电材料上施加导电材料，在至少一个成对的焊盘中的每一个的导电材料中形成凹部，以便 暴露至少一个成对的焊盘中的每一个的一部分，其中至少一对成对的焊盘上的凹部形成为彼此对应的位置; 以及至少将具有两个相对的导电端子的电子部件安装在所述至少一个成对的焊盘上，以使得所述两个相对的导电端子被引入所述导电材料的相应的凹部中，以使所述电子部件电连接 通过回流通过导电材料到达至少一个成对的焊盘。 导电材料的凹槽能够有效地将电子元件固定就位。 此外，电子部件的两个端子在其下方不形成导电材料，以防止电子部件因导电材料的均匀施加而产生倾斜。

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