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    Nonvolatile memory device and method of fabricating the same
    1.
    发明申请
    Nonvolatile memory device and method of fabricating the same 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号：US20090045455A1

    公开(公告)日：2009-02-19

    申请号：US12219465

    申请日：2008-07-23

    申请人： Kwang-soo Seol ,  Sang-jin Park ,  Sang-moo Choi ,  Hyo-sug Lee ,  Jung-hun Sung

    发明人： Kwang-soo Seol ,  Sang-jin Park ,  Sang-moo Choi ,  Hyo-sug Lee ,  Jung-hun Sung

    IPC分类号： H01L29/792 ,  H01L21/28

    CPC分类号： H01L29/4234 ,  H01L29/40117 ,  H01L29/513 ,  H01L29/66833

    摘要： Example embodiments relate to nonvolatile semiconductor memory devices using an electric charge storing layer as a storage node and fabrication methods thereof. An electric charge trap type nonvolatile memory device may include a tunneling film, an electric charge storing layer, a blocking insulation film, and a gate electrode. The blocking insulation film may be an aluminum oxide having an energy band gap larger than that of a γ-phase aluminum oxide film. An α-phase crystalline aluminum oxide film as a blocking insulation film may have an energy band gap of about 7.0 eV or more along with fewer defects. The crystalline aluminum oxide film may be formed by providing a source film (e.g., AlF3 film) on or within a preliminary blocking insulation film (e.g., amorphous aluminum oxide film) and performing a heat treatment. Alternatively, an aluminum compound (e.g., AlF3) may be introduced into the preliminary blocking insulation film by other diffusion methods or ion implantation. Accordingly, the ability of the memory device to maintain electric charges may be improved, the operating voltage for programming and erasing may be lowered, and the operating speed may be increased.

    摘要翻译： 示例性实施例涉及使用电荷存储层作为存储节点的非易失性半导体存储器件及其制造方法。 电荷阱型非易失性存储器件可以包括隧穿膜，电荷存储层，阻挡绝缘膜和栅电极。 阻挡绝缘膜可以是具有比γ相氧化铝膜的能带隙大的能带隙的氧化铝。 作为阻挡绝缘膜的α相结晶氧化铝膜可以具有约7.0eV以上的能带隙和更少的缺陷。 结晶氧化铝膜可以通过在预先隔离绝缘膜（例如无定形氧化铝膜）上或内部提供源膜（例如，AlF 3膜）并进行热处理而形成。 或者，可以通过其它扩散方法或离子注入将铝化合物（例如，AlF 3）引入到初步阻挡绝缘膜中。 因此，可以提高存储器件保持电荷的能力，可以降低用于编程和擦除的操作电压，并且可以提高操作速度。

    Charge trap memory device with blocking insulating layer having higher-dielectric constant and larger energy band-gap and method of manufacturing the same
    2.
    发明申请
    Charge trap memory device with blocking insulating layer having higher-dielectric constant and larger energy band-gap and method of manufacturing the same 审中-公开
    具有较高介电常数和较大能带隙的阻挡绝缘层的电荷陷阱存储器及其制造方法

    公开(公告)号：US20080185633A1

    公开(公告)日：2008-08-07

    申请号：US12068060

    申请日：2008-02-01

    申请人： Sang-moo Choi ,  Hyo-sug Lee ,  Kwang-soo Seol ,  Sang-jin Park ,  Eun-ha Lee

    发明人： Sang-moo Choi ,  Hyo-sug Lee ,  Kwang-soo Seol ,  Sang-jin Park ,  Eun-ha Lee

    IPC分类号： H01L29/788 ,  H01L29/792 ,  H01L21/336

    CPC分类号： H01L29/7881 ,  H01L29/513 ,  H01L29/792

    摘要： A charge trap memory device according to example embodiments may include a tunnel insulating layer provided on a substrate. A charge trap layer may be provided on the tunnel insulating layer. A blocking insulating layer may be provided on the charge trap layer, wherein the blocking insulating layer may include a lanthanide (e.g., lanthanum). The blocking insulating layer may further include aluminum and oxygen, wherein the ratio of lanthanide to aluminum may be greater than 1 (e.g., about 1.5 to about 2). The charge trap memory device may further include a buffer layer provided between the charge trap layer and the blocking insulating layer, and a gate electrode provided on the blocking insulating layer.

    摘要翻译： 根据示例性实施例的电荷陷阱存储器件可以包括设置在衬底上的隧道绝缘层。 电荷陷阱层可以设置在隧道绝缘层上。 阻挡绝缘层可以设置在电荷陷阱层上，其中阻挡绝缘层可以包括镧系元素（例如镧）。 阻挡绝缘层可以进一步包括铝和氧，其中镧系元素与铝的比可以大于1（例如约1.5至约2）。 电荷陷阱存储器件还可以包括设置在电荷陷阱层和阻挡绝缘层之间的缓冲层，以及设置在阻挡绝缘层上的栅电极。

    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers
    5.
    发明授权
    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers 失效
    非易失性存储器件及其编程方法，包括通过电荷陷阱层之间的衬垫氧化物层移动电子

    公开(公告)号：US07668016B2

    公开(公告)日：2010-02-23

    申请号：US12078141

    申请日：2008-03-27

    申请人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    发明人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0475 ,  G11C16/10 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/7923

    摘要： Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.

    摘要翻译： 提供非易失性存储器件以及通过衬垫氧化物层对电子在电荷陷阱层之间移动的非易失性存储器件进行编程的方法。 非易失性存储器件包括半导体衬底上的电荷陷阱层，并且存储电子，在第一电荷陷阱层上形成焊盘氧化物层，并且在焊盘氧化物层上存储第二陷阱层并存储电子。 在写入数据的编程模式中，所存储的电子在第一电荷陷阱层的第一位置和第二电荷陷阱层的第一位置之间通过焊盘氧化物层或第一电荷陷阱的第二位置之间移动 层和第二电荷陷阱层的第二位置穿过衬垫氧化物层。

    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers
    6.
    发明申请
    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers 失效
    非易失性存储器件及其编程方法，包括通过电荷陷阱层之间的衬垫氧化物层移动电子

    公开(公告)号：US20090034341A1

    公开(公告)日：2009-02-05

    申请号：US12078141

    申请日：2008-03-27

    申请人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    发明人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    IPC分类号： G11C16/04 ,  H01L29/792

    CPC分类号： G11C16/0475 ,  G11C16/10 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/7923

    摘要： Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.

    摘要翻译： 提供非易失性存储器件以及通过衬垫氧化物层对电子在电荷陷阱层之间移动的非易失性存储器件进行编程的方法。 非易失性存储器件包括半导体衬底上的电荷陷阱层，并且存储电子，在第一电荷陷阱层上形成焊盘氧化物层，并且在焊盘氧化物层上存储第二陷阱层并存储电子。 在写入数据的编程模式中，所存储的电子在第一电荷陷阱层的第一位置和第二电荷陷阱层的第一位置之间通过焊盘氧化物层或第一电荷陷阱的第二位置之间移动 层和第二电荷陷阱层的第二位置穿过衬垫氧化物层。

    Method of programming nonvolatile memory device
    8.
    发明授权
    Method of programming nonvolatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号：US07760551B2

    公开(公告)日：2010-07-20

    申请号：US12232082

    申请日：2008-09-10

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/3413 ,  G11C16/3454 ,  G11C16/3486

    摘要： A method of programming a nonvolatile memory device may include applying a program voltage to a memory cell. A supplementary pulse may be applied to the memory cell to facilitate thermalization of charges after the application of the program voltage. A recovery voltage may be applied to the memory cell after the application of the supplementary pulse. A program state of the memory cell may be verified using a verification voltage after the application of the recovery voltage.

    摘要翻译： 非易失性存储器件的编程方法可以包括将程序电压施加到存储单元。 补充脉冲可以施加到存储器单元，以便在施加编程电压之后促进电荷的热化。 在施加补充脉冲之后，可以将复原电压施加到存储单元。 可以在施加恢复电压之后使用验证电压来验证存储器单元的编程状态。

    Method of programming nonvolatile memory device
    10.
    发明申请
    Method of programming nonvolatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号：US20090067247A1

    公开(公告)日：2009-03-12

    申请号：US12232082

    申请日：2008-09-10

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    IPC分类号： G11C16/04 ,  G11C16/06

    CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/3413 ,  G11C16/3454 ,  G11C16/3486

    摘要： A method of programming a nonvolatile memory device may include applying a program voltage to a memory cell. A supplementary pulse may be applied to the memory cell to facilitate thermalization of charges after the application of the program voltage. A recovery voltage may be applied to the memory cell after the application of the supplementary pulse. A program state of the memory cell may be verified using a verification voltage after the application of the recovery voltage.

    摘要翻译： 非易失性存储器件的编程方法可以包括将程序电压施加到存储单元。 补充脉冲可以施加到存储器单元，以便在施加编程电压之后促进电荷的热化。 在施加补充脉冲之后，可以将复原电压施加到存储单元。 可以在施加恢复电压之后使用验证电压来验证存储器单元的编程状态。