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    INTERNAL PLASMA GRID APPLICATIONS FOR SEMICONDUCTOR FABRICATION
    2.
    发明申请
    INTERNAL PLASMA GRID APPLICATIONS FOR SEMICONDUCTOR FABRICATION 有权
    内部等离子体应用半导体制造

    公开(公告)号：US20140302678A1

    公开(公告)日：2014-10-09

    申请号：US14184491

    申请日：2014-02-19

    Applicant: LAM RESEARCH CORPORATION

    Inventor： Alex Paterson ,  Do Young Kim ,  Gowri Kamarthy ,  Helene Del Puppo ,  Jen-Kan Yu ,  Monica Titus ,  Radhika Mani ,  Noel Yui Sun ,  Nicolas Gani ,  Yoshie Kimura ,  Ting-Ying Chung

    IPC: H01L21/3065

    CPC classification number: H01L21/0273 ,  H01J37/321 ,  H01J37/32422 ,  H01L21/28123 ,  H01L21/3065 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/76224 ,  H01L29/66795

    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.

    Abstract translation: 这里公开的实施例涉及用于蚀刻半导体衬底的改进的方法和设备。 等离子体栅格组件位于反应室中，以将室分成上部和下部子室。 等离子体栅格组件可以包括具有特定纵横比的槽的一个或多个等离子体栅格，其允许某些物质从上部子室通到下部子室。 在一些情况下，在上部子室中产生电子 - 离子等离子体。 使其通过栅格到下部子室的电子在它们通过时被冷却。 在某些情况下，这导致下部子室中的离子离子等离子体。 离子离子等离子体可以用于各种蚀刻工艺中。

    INTERNAL PLASMA GRID APPLICATIONS FOR SEMICONDUCTOR FABRICATION
    5.
    发明申请
    INTERNAL PLASMA GRID APPLICATIONS FOR SEMICONDUCTOR FABRICATION 审中-公开
    内部等离子体应用半导体制造

    公开(公告)号：US20160086795A1

    公开(公告)日：2016-03-24

    申请号：US14954586

    申请日：2015-11-30

    Applicant: Lam Research Corporation

    Inventor： Alex Paterson ,  Do Young Kim ,  Gowri Kamarthy ,  Helene Del Puppo ,  Jen-Kan Yu ,  Monica Titus ,  Radhika Mani ,  Noel Yui Sun ,  Nicolas Gani ,  Yoshie Kimura ,  Ting-Ying Chung

    IPC: H01L21/027 ,  H01L21/311

    CPC classification number: H01L21/0273 ,  H01J37/321 ,  H01J37/32422 ,  H01L21/28123 ,  H01L21/3065 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/76224 ,  H01L29/66795

    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.

    Abstract translation: 这里公开的实施例涉及用于蚀刻半导体衬底的改进的方法和设备。 等离子体栅格组件位于反应室中，以将室分成上部和下部子室。 等离子体栅格组件可以包括具有特定纵横比的槽的一个或多个等离子体栅格，其允许某些物质从上部子室通到下部子室。 在一些情况下，在上部子室中产生电子 - 离子等离子体。 使其通过栅格到下部子室的电子在它们通过时被冷却。 在某些情况下，这导致下部子室中的离子离子等离子体。 离子离子等离子体可以用于各种蚀刻工艺中。

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