公开(公告)号：US20150053347A1

公开(公告)日：2015-02-26

申请号：US14470544

申请日：2014-08-27

Applicant: Lam Research Corporation

Inventor： Yoshie Kimura ,  Tom Kamp ,  Eric Pape ,  Rohit DeshPande ,  Keith Gaff ,  Gowri Kamarthy

IPC: H01L21/66 ,  H01L21/67

CPC classification number: H01L22/26 ,  H01J37/32724 ,  H01J37/32926 ,  H01J37/32935 ,  H01L21/67069 ,  H01L21/67248 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system. The controller also receives critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data of the at least one previously processed wafers and the critical device parameters of the current wafer. The current wafer as subjected to a trimming operation for a duration of the target trim time while controlling temperatures in the temperature control zones to thereby control temperature of each device die location based on the target temperature profile.

Abstract translation: 示例性实施例涉及通过控制等离子体处理系统中的温度调节时间来控制晶片的CD均匀性。 等离子体处理系统具有晶片支撑组件，其包括横跨卡盘的多个可独立控制的温度控制区域和控制每个温度控制区域的控制器。 控制器接收与先前在等离子体处理系统的等离子体室中处理的至少一个晶片相关联的过程控制和温度数据。 控制器还接收等离子体室中要处理的当前晶片的关键器件参数。 控制器基于至少一个先前处理的晶片的过程控制和温度数据以及当前晶片的关键器件参数来计算当前晶片的目标修整时间和目标温度分布。 当前的晶片在控制温度控制区域中的温度的同时进行修整操作，同时控制温度控制区域中的温度，从而基于目标温度分布来控制每个器件管芯位置的温度。

公开(公告)号：US20140220709A1

公开(公告)日：2014-08-07

申请号：US13758266

申请日：2013-02-04

Applicant: LAM RESEARCH CORPORATION

Inventor： Yoshie Kimura ,  Tom Kamp ,  Eric Pape ,  Rohit DeshPande ,  Keith Gaff ,  Gowri Kamarthy

IPC: H01L21/66 ,  H01L21/67

CPC classification number: H01L22/26 ,  H01J37/32724 ,  H01J37/32926 ,  H01J37/32935 ,  H01L21/67069 ,  H01L21/67248 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system, and critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data, and the critical device parameters. The current wafer is trimmed during the target trim time while the temperature of each device die location is controlled based on the target temperature profile.

Abstract translation: 示例性实施例涉及通过控制等离子体处理系统中的温度调节时间来控制晶片的CD均匀性。 等离子体处理系统具有晶片支撑组件，其包括横跨卡盘的多个可独立控制的温度控制区域和控制每个温度控制区域的控制器。 控制器接收与先前在等离子体处理系统的等离子体室中处理的至少一个晶片相关联的过程控制和温度数据，以及在等离子体室中待处理的当前晶片的关键器件参数。 控制器基于过程控制和温度数据以及关键设备参数来计算当前晶片的目标修整时间和目标温度分布。 在目标修整时间期间修剪当前晶片，同时基于目标温度分布来控制每个器件管芯位置的温度。

公开(公告)号：US20190103253A1

公开(公告)日：2019-04-04

申请号：US16189329

申请日：2018-11-13

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

CPC classification number: H01J37/32174 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32128 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/32706

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.

公开(公告)号：US09245761B2

公开(公告)日：2016-01-26

申请号：US13916318

申请日：2013-06-12

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Thorsten Lill ,  Vahid Vahedi ,  Alex Paterson ,  Monica Titus ,  Gowri Kamarthy

IPC: C23C16/00 ,  H01L21/306 ,  H01L21/3065 ,  H01J37/32

CPC classification number: H01L21/67069 ,  H01J37/32009 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32633 ,  H01J37/32715 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

Abstract translation: 这里公开的实施例涉及用于蚀刻半导体衬底的改进的方法和设备。 等离子体栅格组件位于反应室中，以将室分成上部和下部子室。 等离子体栅格组件可以包括具有特定纵横比的槽的一个或多个等离子体栅格，其允许某些物质从上部子室通到下部子室。 在使用多个等离子体栅格的情况下，一个或多个栅格可以是可移动的，允许在至少下部子室中等离子体条件的稳定性。 在一些情况下，在上部子室中产生电子 - 离子等离子体。 使其通过栅格到下部子室的电子在它们通过时被冷却。 在某些情况下，这导致下部子室中的离子离子等离子体。

公开(公告)号：US20140302680A1

公开(公告)日：2014-10-09

申请号：US13916318

申请日：2013-06-12

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Thorsten Lill ,  Vahid Vahedi ,  Alex Paterson ,  Monica Titus ,  Gowri Kamarthy

IPC: H01L21/3065 ,  H01L21/67

CPC classification number: H01L21/67069 ,  H01J37/32009 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32633 ,  H01J37/32715 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

Abstract translation: 这里公开的实施例涉及用于蚀刻半导体衬底的改进的方法和设备。 等离子体栅格组件位于反应室中，以将室分成上部和下部子室。 等离子体栅格组件可以包括具有特定纵横比的槽的一个或多个等离子体栅格，其允许某些物质从上部子室通到下部子室。 在使用多个等离子体栅格的情况下，一个或多个栅格可以是可移动的，允许至少在下部子室中的等离子体条件的稳定性。 在一些情况下，在上部子室中产生电子 - 离子等离子体。 使其通过栅格到下部子室的电子在它们通过时被冷却。 在某些情况下，这导致下部子室中的离子离子等离子体。

公开(公告)号：US20140302678A1

公开(公告)日：2014-10-09

申请号：US14184491

申请日：2014-02-19

Applicant: LAM RESEARCH CORPORATION

Inventor： Alex Paterson ,  Do Young Kim ,  Gowri Kamarthy ,  Helene Del Puppo ,  Jen-Kan Yu ,  Monica Titus ,  Radhika Mani ,  Noel Yui Sun ,  Nicolas Gani ,  Yoshie Kimura ,  Ting-Ying Chung

IPC: H01L21/3065

CPC classification number: H01L21/0273 ,  H01J37/321 ,  H01J37/32422 ,  H01L21/28123 ,  H01L21/3065 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/76224 ,  H01L29/66795

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.

Abstract translation: 这里公开的实施例涉及用于蚀刻半导体衬底的改进的方法和设备。 等离子体栅格组件位于反应室中，以将室分成上部和下部子室。 等离子体栅格组件可以包括具有特定纵横比的槽的一个或多个等离子体栅格，其允许某些物质从上部子室通到下部子室。 在一些情况下，在上部子室中产生电子 - 离子等离子体。 使其通过栅格到下部子室的电子在它们通过时被冷却。 在某些情况下，这导致下部子室中的离子离子等离子体。 离子离子等离子体可以用于各种蚀刻工艺中。

公开(公告)号：US09633846B2

公开(公告)日：2017-04-25

申请号：US14954586

申请日：2015-11-30

Applicant: Lam Research Corporation

Inventor： Alex Paterson ,  Do Young Kim ,  Gowri Kamarthy ,  Helene Del Puppo ,  Jen-Kan Yu ,  Monica Titus ,  Radhika Mani ,  Noel Yui Sun ,  Nicolas Gani ,  Yoshie Kimura ,  Ting-Ying Chung

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/3213 ,  H01J37/32 ,  H01L21/28 ,  H01L29/66 ,  H01L21/311 ,  H01L21/762

CPC classification number: H01L21/0273 ,  H01J37/321 ,  H01J37/32422 ,  H01L21/28123 ,  H01L21/3065 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/76224 ,  H01L29/66795

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes.

公开(公告)号：US20160379804A1

公开(公告)日：2016-12-29

申请号：US15261738

申请日：2016-09-09

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

CPC classification number: H01J37/32174 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32128 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/32706

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.

Abstract translation: 描述了控制等离子体室内离子能量的系统和方法。 系统中的一个包括耦合到正弦RF发生器的上电极，用于接收正弦信号，以及用于产生非正弦信号的非正弦RF发生器。 该系统还包括耦合到非正弦RF发生器的功率放大器。 功率放大器用于放大非正弦信号以产生放大信号。 该系统包括耦合到功率放大器的滤波器。 滤波器用于使用滤波信号对放大的信号进行滤波以产生滤波信号。 该系统包括联接到过滤器的卡盘。 卡盘面向上电极的至少一部分并且包括下电极。 下部电极用于接收滤波后的信号，以便于在卡盘处获得离子能量，处于较低阈值和较高阈值之间。

公开(公告)号：US09460894B2

公开(公告)日：2016-10-04

申请号：US13930138

申请日：2013-06-28

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

CPC classification number: H01J37/32174 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32128 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/32706

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.

Abstract translation: 描述了控制等离子体室内离子能量的系统和方法。 系统中的一个包括耦合到正弦RF发生器的上电极，用于接收正弦信号，以及用于产生非正弦信号的非正弦RF发生器。 该系统还包括耦合到非正弦RF发生器的功率放大器。 功率放大器用于放大非正弦信号以产生放大信号。 该系统包括耦合到功率放大器的滤波器。 滤波器用于使用滤波信号对放大的信号进行滤波以产生滤波信号。 该系统包括联接到过滤器的卡盘。 卡盘面向上电极的至少一部分并且包括下电极。 下部电极用于接收滤波后的信号，以便于在卡盘处获得离子能量，处于较低阈值和较高阈值之间。

公开(公告)号：US10424461B2

公开(公告)日：2019-09-24

申请号：US16189329

申请日：2018-11-13

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.