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公开(公告)号：US20200152452A1
公开(公告)日：2020-05-14
申请号：US16740128
申请日：2020-01-10
发明人： Bart J. van Schravendijk , Akhil Singhal , Joseph Hung-chi Wei , Bhadri N. Varadarajan , Kevin M. McLaughlin , Casey Holder , Ananda K. Banerji
IPC分类号： H01L21/02 , H01L23/29 , H01L21/56 , H01L43/12 , H01L43/08 , H01L43/02 , H01J37/32 , C23C16/50 , C23C16/56 , C23C16/515 , C23C16/34 , C23C16/32
摘要： Methods and apparatuses suitable for depositing low hydrogen content, hermetic, thin encapsulation layers at temperatures less than about 300° C. are provided herein. Methods involve pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300° C.
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公开(公告)号：US10514598B2
公开(公告)日：2019-12-24
申请号：US15691659
申请日：2017-08-30
发明人： Jeffrey Marks , George Andrew Antonelli , Richard A. Gottscho , Dennis M. Hausmann , Adrien LaVoie , Thomas Joseph Knisley , Sirish K. Reddy , Bhadri N. Varadarajan , Artur Kolics
IPC分类号： G03F7/16 , C23C14/56 , H01L21/67 , G03F1/76 , C23C18/14 , C23C18/16 , C23C18/18 , G03F7/004 , H01L21/033 , H01L21/3213 , G03F7/20 , G03F7/26 , G03F7/36 , C23C16/44
摘要： Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.
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公开(公告)号：US10297442B2
公开(公告)日：2019-05-21
申请号：US15283159
申请日：2016-09-30
发明人： Bhadri N. Varadarajan , Bo Gong , Guangbi Yuan , Zhe Gui , Fengyuan Lai
IPC分类号： H01L21/02 , C23C16/50 , C23C16/455 , C23C16/40 , C23C16/32 , C23C14/48 , H01J37/32 , H01L29/49 , H01L21/768 , H01L29/78
摘要： Provided are methods and apparatuses for depositing a graded or multi-layered silicon carbide film using remote plasma. A graded or multi-layered silicon carbide film can be formed under process conditions that provide one or more organosilicon precursors onto a substrate in a reaction chamber. Radicals of source gas in a substantially low energy state, such as radicals of hydrogen in the ground state, are provided from a remote plasma source into reaction chamber. In addition, co-reactant gas is flowed towards the reaction chamber. In some implementations, radicals of the co-reactant gas are provided from the remote plasma source into the reaction chamber. A flow rate of the co-reactant gas can be changed over time, incrementally or gradually, to form a multi-layered silicon carbide film or a graded silicon carbide film having a composition gradient from a first surface to a second surface of the graded silicon carbide film.
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公开(公告)号：US20180269061A1
公开(公告)日：2018-09-20
申请号：US15976793
申请日：2018-05-10
发明人： Reza Arghavani , Samantha Tan , Bhadri N. Varadarajan , Adrien LaVoie , Ananda K. Banerji , Jun Qian , Shankar Swaminathan
IPC分类号： H01L21/223 , C23C16/52 , H01L21/67 , C23C16/455 , H01L21/22 , H01L21/225 , C23C16/04 , H01L29/66 , C23C16/50
CPC分类号： H01L21/223 , C23C16/045 , C23C16/45529 , C23C16/45544 , C23C16/50 , C23C16/52 , H01L21/2225 , H01L21/2252 , H01L21/67155 , H01L21/67207 , H01L29/66803
摘要： Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor. Also disclosed herein are multi-station substrate processing apparatuses for doping the fin-shaped channel regions of partially fabricated 3-D transistors.
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公开(公告)号：US09778561B2
公开(公告)日：2017-10-03
申请号：US14610038
申请日：2015-01-30
发明人： Jeffrey Marks , George Andrew Antonelli , Richard A. Gottscho , Dennis M. Hausmann , Adrien LaVoie , Thomas Joseph Knisley , Sirish K. Reddy , Bhadri N. Varadarajan , Artur Kolics
IPC分类号： B05D3/06 , G03F1/76 , C23C18/14 , C23C18/16 , C23C18/18 , H01L21/033 , H01L21/3213 , G03F7/004 , G03F7/16
CPC分类号： G03F1/76 , C23C18/14 , C23C18/1612 , C23C18/165 , C23C18/182 , G03F7/0043 , G03F7/16 , G03F7/167 , H01L21/0332 , H01L21/0337 , H01L21/3213
摘要： Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.
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6.发明授权Selective formation of dielectric barriers for metal interconnects in semiconductor devices 有权选择性地形成用于半导体器件中的金属互连的电介质阻挡层公开(公告)号：US09418889B2
公开(公告)日：2016-08-16
申请号：US14742180
申请日：2015-06-17
发明人： Thomas Weller Mountsier , Hui-Jung Wu , Bhadri N. Varadarajan , Nagraj Shankar , William T. Lee
IPC分类号： H01L21/44 , H01L21/768 , H01L21/02 , H01L23/532
CPC分类号： H01L21/76831 , H01L21/02126 , H01L21/02167 , H01L21/0217 , H01L21/02178 , H01L21/02211 , H01L21/02219 , H01L21/02274 , H01L21/0228 , H01L21/02362 , H01L21/3105 , H01L21/31116 , H01L21/321 , H01L21/76814 , H01L21/76843 , H01L21/76877 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A dielectric diffusion barrier is deposited on a substrate that has a via and an overlying trench etched into an exposed layer of inter-layer dielectric, wherein there is exposed metal from the underlying interconnect at the bottom of the via. In order to provide a conductive path from the underlying metallization layer to the metallization layer that is being formed over it, the dielectric diffusion barrier is formed selectively on the inter-layer dielectric and not on the exposed metal at the bottom of the via. In one example a dielectric SiNC diffusion barrier layer is selectively deposited on the inter-layer dielectric using a remote plasma deposition and a precursor that contains both silicon and nitrogen atoms. Generally, a variety of dielectric diffusion barrier materials with dielectric constants of between about 3.0-20.0 can be selectively formed on inter-layer dielectric.
摘要翻译： 电介质扩散屏障沉积在衬底上，衬底上具有蚀刻到层间电介质的暴露层中的通孔和上覆沟槽，其中在通孔底部存在来自底层互连件的暴露金属。 为了提供从下面的金属化层到在其上形成的金属化层的导电路径，电介质扩散阻挡层选择性地形成在层间电介质上，而不是形成在通孔底部的暴露的金属上。 在一个示例中，电介质SiNC扩散阻挡层使用远程等离子体沉积和包含硅和氮原子的前体选择性沉积在层间电介质上。 通常，介电常数介于约3.0-20.0之间的各种介电扩散阻挡材料可以选择性地形成在层间电介质上。
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公开(公告)号：US20150221519A1
公开(公告)日：2015-08-06
申请号：US14610038
申请日：2015-01-30
发明人： Jeffrey Marks , George Andrew Antonelli , Richard A. Gottscho , Dennis M. Hausmann , Adrien LaVoie , Thomas Joseph Knisley , Sirish K. Reddy , Bhadri N. Varadarajan , Artur Kolics
IPC分类号： H01L21/308 , G03F1/76
CPC分类号： G03F1/76 , C23C18/14 , C23C18/1612 , C23C18/165 , C23C18/182 , G03F7/0043 , G03F7/16 , G03F7/167 , H01L21/0332 , H01L21/0337 , H01L21/3213
摘要： Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.
摘要翻译： 用于形成金属硬掩模的真空集成的无光致抗蚀剂方法和设备可以提供低于30nm的图案分辨率。 对图案化剂敏感的含金属（例如金属盐或有机金属化合物）膜沉积在半导体衬底上。 然后通过在真空环境中暴露于图案化剂直接（即，不使用光致抗蚀剂）将含金属的膜图案化以形成金属掩模。 例如，含金属的膜是光敏的，并且使用诸如EUV光刻的亚-30nm波长光刻法进行图案化。
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公开(公告)号：US20240318312A1
公开(公告)日：2024-09-26
申请号：US18679771
申请日：2024-05-31
发明人： Rachel E. Batzer , Huatan Qiu , Bhadri N. Varadarajan , Patrick Girard Breiling , Bo Gong , Will Schlosser , Zhe Gui , Taide Tan , Geoffrey Hohn
IPC分类号： C23C16/455 , B05C13/02 , C23C16/458 , C23C16/505 , H01J37/32 , H01L21/67 , H01L21/687
CPC分类号： C23C16/45565 , C23C16/45572 , C23C16/505 , H01J37/32082 , H01J37/32357 , H01J37/32422 , H01J37/3244 , H01J37/32522 , H01J37/32715 , H01L21/67011 , H01L21/67017 , H01L21/67207 , H01L21/68735 , H01L21/68742 , H01L21/68757 , H01L21/68785 , B05C13/02 , C23C16/4581 , C23C16/4583 , H01J37/32642 , H01J2237/334 , H01L21/67069 , H01L21/6715
摘要： A substrate processing system includes a first chamber including a substrate support. A showerhead is arranged above the first chamber and is configured to filter ions and deliver radicals from a plasma source to the first chamber. The showerhead includes a heat transfer fluid plenum, a secondary gas plenum including an inlet to receive secondary gas and a plurality of secondary gas injectors to inject the secondary gas into the first chamber, and a plurality of through holes passing through the showerhead. The through holes are not in fluid communication with the heat transfer fluid plenum or the secondary gas plenum.
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公开(公告)号：US20240213159A1
公开(公告)日：2024-06-27
申请号：US18291200
申请日：2022-07-19
发明人： Asish Parbatani , Bart J. van Schravendijk , Bhadri N. Varadarajan , Ieva Narkeviciute , Easwar Srinivasan , Kashish Sharma , Randolph Knarr , Stefan Schmitz , Vinayak Ramanan
IPC分类号： H01L23/532 , C23C16/04 , C23C16/26 , C23C16/455 , C23C16/56 , H01L21/768
CPC分类号： H01L23/53276 , C23C16/04 , C23C16/26 , C23C16/45525 , C23C16/56 , H01L21/7685 , H01L23/53238
摘要： A method for selectively depositing graphene on a metal surface in a back-end-of-line substrate is provided. The method comprises providing the substrate comprising a first dielectric layer and a copper interconnect in the first dielectric layer, the copper interconnect having an exposed metal surface, wherein the exposed metal surface comprises copper, and selectively deposing a carbon layer on the exposed metal surface.
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10.发明授权公开(公告)号：US11848199B2
公开(公告)日：2023-12-19
申请号：US17286407
申请日：2019-10-10
CPC分类号： H01L21/02274 , C23C16/0272 , C23C16/308 , C23C16/45536 , C23C16/45553 , C23C16/56 , H01J37/32357 , H01L21/0214 , H01L21/0228 , H01L21/02126 , H01L21/02167 , H01J2237/332
摘要： A doped or undoped silicon carbide (SiCxOyNz) film can be deposited in one or more features of a substrate for gapfill. After a first thickness of the doped or undoped silicon carbide film is deposited in the one or more features, the doped or undoped silicon carbide film is exposed to a remote hydrogen plasma under conditions that cause a size of an opening near a top surface of each of the one or more features to increase, where the conditions can be controlled by controlling treatment time, treatment frequency, treatment power, and/or remote plasma gas composition. Operations of depositing additional thicknesses of silicon carbide film and performing a remote hydrogen plasma treatment are repeated to at least substantially fill the one or more features. Various time intervals between deposition and plasma treatment may be added to modulate gapfill performance.
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