公开(公告)号：US20160155508A1

公开(公告)日：2016-06-02

申请号：US15015530

申请日：2016-02-04

Applicant: MACRONIX INTERNATIONAL CO., LTD

Inventor： Ya Jui Lee ,  Kuan Fu Chen

IPC: G11C16/04 ,  G11C16/06

CPC classification number: G11C16/0483 ,  G11C5/063 ,  G11C7/02 ,  G11C7/14 ,  G11C8/14 ,  G11C16/06 ,  G11C16/08 ,  G11C16/12 ,  G11C16/16 ,  G11C16/26 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157

Abstract: A nonvolatile semiconductor device is provided that includes a substrate and a plurality of blocks forming a string. Each block is positioned on the substrate and includes a plurality of word lines disposed on the substrate. The string includes a single ground select line disposed at one side of the plurality of blocks, and a single string select line is disposed at another side of the plurality of blocks. In some embodiments, the word lines of the plurality of blocks define gaps separating each block of the string from neighboring blocks of the string. One or more dummy word lines may be disposed in each gap between blocks of the string. Corresponding methods of manufacturing the nonvolatile semiconductor device and manipulating the nonvolatile semiconductor device are provided.

Abstract translation: 提供一种非易失性半导体器件，其包括基板和形成串的多个块。 每个块位于衬底上并且包括设置在衬底上的多个字线。 串包括设置在多个块的一侧的单个地选择线，并且单个串选择线设置在多个块的另一侧。 在一些实施例中，多个块的字线定义了将字符串的每个块与字符串的相邻块分开的间隙。 可以在串的块之间的每个间隙中设置一个或多个虚拟字线。 提供制造非易失性半导体器件和操纵非易失性半导体器件的相应方法。

公开(公告)号：US09286984B2

公开(公告)日：2016-03-15

申请号：US14324743

申请日：2014-07-07

Applicant: MACRONIX INTERNATIONAL CO., LTD

Inventor： Ya Jui Lee ,  Kuan Fu Chen

IPC: G11C16/04 ,  G11C16/08 ,  H01L27/115 ,  G11C5/06 ,  G11C16/16 ,  G11C16/12 ,  G11C16/26 ,  H01L21/768

CPC classification number: G11C16/0483 ,  G11C5/063 ,  G11C7/02 ,  G11C7/14 ,  G11C8/14 ,  G11C16/06 ,  G11C16/08 ,  G11C16/12 ,  G11C16/16 ,  G11C16/26 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157

Abstract: A nonvolatile semiconductor device is provided that includes a substrate and a plurality of blocks forming a string. Each block is positioned on the substrate and includes a plurality of word lines disposed on the substrate. The string includes a single ground select line disposed at one side of the plurality of blocks, and a single string select line is disposed at another side of the plurality of blocks. In some embodiments, the word lines of the plurality of blocks define gaps separating each block of the string from neighboring blocks of the string. One or more dummy word lines may be disposed in each gap between blocks of the string. Corresponding methods of manufacturing the nonvolatile semiconductor device and manipulating the nonvolatile semiconductor device are provided.

公开(公告)号：US20160307636A1

公开(公告)日：2016-10-20

申请号：US14689489

申请日：2015-04-17

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ya Jui Lee ,  Kuan Fu Chen

IPC: G11C16/34 ,  G11C16/12

CPC classification number: G11C16/3427 ,  G11C16/10

Abstract: Methods and apparatuses are contemplated herein for enhancing the read performance and data retention of nonvolatile memory devices. In an example embodiment, a method is provided for controlling a nonvolatile memory device that includes a matrix of memory cells, wherein each memory cell in the matrix includes a programmable floating gate. The method includes programming a floating gate of a first memory cell of the nonvolatile memory device, and shifting a voltage of the floating gate of the first memory cell of the nonvolatile memory device by creating a coupling effect that impacts the floating gate of the first memory cell. In this regard, the method may include programming one or more nearby memory cells, in which case the coupling effect may comprise a floating gate coupling effect between the first memory cell and the one or more nearby memory cells.

Abstract translation: 本文中设想的方法和装置用于增强非易失性存储器件的读取性能和数据保持。 在示例实施例中，提供了一种用于控制包括存储器单元矩阵的非易失性存储器件的方法，其中矩阵中的每个存储器单元包括可编程浮置栅极。 该方法包括对非易失性存储器件的第一存储单元的浮置栅极进行编程，以及通过产生影响第一存储器的浮置栅极的耦合效应来移动非易失性存储器件的第一存储单元的浮置栅极的电压 细胞。 在这方面，该方法可以包括对一个或多个附近的存储器单元进行编程，在这种情况下，耦合效应可以包括第一存储单元和一个或多个附近的存储单元之间的浮动栅极耦合效应。

公开(公告)号：US09543001B1

公开(公告)日：2017-01-10

申请号：US14985622

申请日：2015-12-31

Applicant: Macronix International Co., Ltd.

Inventor： Ya Jui Lee ,  Kuan Fu Chen

IPC: G11C16/06 ,  G11C11/56 ,  G11C16/34 ,  G11C16/10 ,  G11C16/26

CPC classification number: G11C11/5628 ,  G11C16/10 ,  G11C16/3459 ,  G11C2211/5621 ,  G11C2211/5644

Abstract: First threshold voltages of one or more memory cells in a memory array are obtained. For each memory cell in the one or more memory cells, a target threshold voltage for the memory cell is identified. A number of programming shots to reach the target threshold voltage of the memory cell is determined based on the first threshold voltage of the memory cell. Respective number of programming shots, which are determined for the one or more memory cells, are applied to the one or more memory cells. Whether respective target threshold voltages for the one or more memory cells are reached is verified upon applying the respective number of programming shots to the one or more memory cells.

Abstract translation: 获得存储器阵列中的一个或多个存储单元的第一阈值电压。 对于一个或多个存储器单元中的每个存储器单元，识别存储器单元的目标阈值电压。 基于存储器单元的第一阈值电压来确定达到存储单元的目标阈值电压的多个编程镜头。 针对一个或多个存储器单元确定的相应数量的编程镜头被应用于一个或多个存储器单元。 在对一个或多个存储器单元应用相应数量的编程镜头时，验证是否达到一个或多个存储器单元的相应目标阈值电压。

公开(公告)号：US09437319B1

公开(公告)日：2016-09-06

申请号：US14750065

申请日：2015-06-25

Applicant: Macronix International Co., Ltd.

Inventor： Atsuhiro Suzuki ,  Ya Jui Lee ,  Kuan Fu Chen ,  Chih-Wei Lee

IPC: G11C11/34 ,  G11C16/34 ,  G11C16/10 ,  G11C11/56

CPC classification number: G11C11/5628 ,  G11C16/10 ,  G11C16/24 ,  G11C16/3459 ,  G11C16/3481 ,  G11C16/3486

Abstract: Provided are methods, devices, and/or the like for reducing the bit line interference when programming non-volatile memory. One method comprises providing a non-volatile memory device comprising a set of cells, each cell associated with a bit line; shooting a programming voltage across each cell; detecting a threshold voltage for each cell; identifying a fast subset of the set of cells and a slow subset of the set of cells based at least in part on the detected threshold voltage for each cell; and shooting the programming voltage until the threshold voltage for each cell is greater than a verify voltage. For each shot a fast bit line bias is applied to the bit line associated each cell of the fast subset and a slow bit line bias is applied to the bit line associated with each cell of the slow subset.

Abstract translation: 提供了在编程非易失性存储器时减少位线干扰的方法，装置和/或类似装置。 一种方法包括提供包括一组单元的非易失性存储器件，每个单元与位线相关联; 拍摄每个单元格上的编程电压; 检测每个单元的阈值电压; 至少部分地基于每个单元的检测到的阈值电压来识别该组单元的快速子集和该组单元的慢子集; 并拍摄编程电压，直到每个单元的阈值电压大于验证电压。 对于每个镜头，快速位线偏置被施加到与快速子集的每个单元相关联的位线，并且慢位线偏置被施加到与慢子集的每个单元相关联的位线。

公开(公告)号：US09424926B2

公开(公告)日：2016-08-23

申请号：US15015530

申请日：2016-02-04

Applicant: MACRONIX INTERNATIONAL CO., LTD

Inventor： Ya Jui Lee ,  Kuan Fu Chen

IPC: G11C16/04 ,  G11C16/06

CPC classification number: G11C16/0483 ,  G11C5/063 ,  G11C7/02 ,  G11C7/14 ,  G11C8/14 ,  G11C16/06 ,  G11C16/08 ,  G11C16/12 ,  G11C16/16 ,  G11C16/26 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157

Abstract: A nonvolatile semiconductor device is provided that includes a substrate and a plurality of blocks forming a string. Each block is positioned on the substrate and includes a plurality of word lines disposed on the substrate. The string includes a single ground select line disposed at one side of the plurality of blocks, and a single string select line is disposed at another side of the plurality of blocks. In some embodiments, the word lines of the plurality of blocks define gaps separating each block of the string from neighboring blocks of the string. One or more dummy word lines may be disposed in each gap between blocks of the string. Corresponding methods of manufacturing the nonvolatile semiconductor device and manipulating the nonvolatile semiconductor device are provided.

Abstract translation: 提供一种非易失性半导体器件，其包括基板和形成串的多个块。 每个块位于衬底上并且包括设置在衬底上的多个字线。 串包括设置在多个块的一侧的单个地选择线，并且单个串选择线设置在多个块的另一侧。 在一些实施例中，多个块的字线定义了将字符串的每个块与字符串的相邻块分开的间隙。 可以在串的块之间的每个间隙中设置一个或多个虚拟字线。 提供制造非易失性半导体器件和操纵非易失性半导体器件的相应方法。