-
公开(公告)号：US09614004B2
公开(公告)日：2017-04-04
申请号：US14965660
申请日：2015-12-10
Applicant: Micron Technology, Inc.
Inventor： Kristy A. Campbell
CPC classification number: H01L27/285 , B82Y10/00 , G11C13/0011 , G11C13/0014 , G11C13/0016 , G11C2213/72 , H01L27/2409 , H01L27/28 , H01L27/286 , H01L29/8615 , H01L45/1608 , H01L45/1683 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0078 , H01L51/0591 , H01L51/102
Abstract: A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.
-
公开(公告)号：US20160087007A1
公开(公告)日：2016-03-24
申请号：US14965660
申请日：2015-12-10
Applicant: Micron Technology, Inc.
Inventor： Kristy A. Campbell
CPC classification number: H01L27/285 , B82Y10/00 , G11C13/0011 , G11C13/0014 , G11C13/0016 , G11C2213/72 , H01L27/2409 , H01L27/28 , H01L27/286 , H01L29/8615 , H01L45/1608 , H01L45/1683 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0078 , H01L51/0591 , H01L51/102
Abstract: A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.
Abstract translation: 通过在底部电极上提供第一金属 - 硫族化物层来形成具有内置二极管的共轭聚合物层。 随后，第二金属 - 硫族化物层设置在第一金属 - 硫属化物层上并与其接触。 第一金属 - 硫族化物层具有第一导电类型，第二金属 - 硫族化物层具有第二导电类型。 第一和第二金属 - 硫族化物层之间的接触平面形成内置二极管的p-n结。 然后将聚合物层选择性地沉积在第二金属 - 硫族化物层上。 第二金属 - 硫族化物层向聚合物层提供离子以改变其电阻率。 然后在聚合物层上提供顶部电极。 示例性存储单元可以具有以下堆叠结构：第一电极/ n型半导体/ p型半导体/共轭聚合物/第二电极。
-
公开(公告)号：US09985076B2
公开(公告)日：2018-05-29
申请号：US15478072
申请日：2017-04-03
Applicant: Micron Technology, Inc.
Inventor： Kristy A. Campbell
CPC classification number: H01L27/285 , B82Y10/00 , G11C13/0011 , G11C13/0014 , G11C13/0016 , G11C2213/72 , H01L27/2409 , H01L27/28 , H01L27/286 , H01L29/8615 , H01L45/1608 , H01L45/1683 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0078 , H01L51/0591 , H01L51/102
Abstract: A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.
-
公开(公告)号：US09147838B2
公开(公告)日：2015-09-29
申请号：US14481411
申请日：2014-09-09
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jon Daley , Kristy A. Campbell
CPC classification number: H01L45/1246 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1608 , H01L45/1666
Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.
Abstract translation: 一种相变存储元件及其形成方法。 存储元件包括第一和第二电极。 第一层相变材料位于第一和第二电极之间。 包括金属 - 硫族化物材料的第二层也在第一和第二电极之间，并且是相变材料和导电材料之一。 绝缘层位于第一和第二层之间。 绝缘层中至少有一个开口提供第一和第二层之间的接触。
-
5.发明申请公开(公告)号：US20150041754A1
公开(公告)日：2015-02-12
申请号：US14524435
申请日：2014-10-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jun Liu , Kristy A. Campbell
IPC: H01L45/00
CPC classification number: H01L45/1675 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/1273 , H01L45/143 , H01L45/16 , H01L45/1616 , H01L45/1625 , Y10S977/773
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.
-
Patent Agency Ranking
6.发明申请公开(公告)号：US20140042575A1
公开(公告)日：2014-02-13
申请号：US14056669
申请日：2013-10-17
Applicant: Micron Technology, Inc.
Inventor： Warren M. Farnworth , Kristy A. Campbell
IPC: H01L31/02
CPC classification number: H01L31/02 , H01L23/552 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83101 , H01L2224/83855 , H01L2224/83865 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00015 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method includes constructing a radiation sensitive component in and/or on a microelectronic device, placing a curable component in and/or on the microelectronic device, and forming a barrier in and/or on the microelectronic device to at least partially inhibit irradiation of the radiation sensitive component. The radiation sensitive component can be doped silicon, chalcogenide, polymeric random access memory, or any other component that is altered when irradiated with one or more specific frequencies of radiation. The curable component can be an adhesive, an underfill layer, an encapsulant, a stand-off, or any other feature constructed of a material that requires curing by irradiation.
Abstract translation: 本文公开了用于制造微电子器件的微电子器件和方法。 在一个实施例中，一种方法包括在微电子器件内和/或微电子器件上构建辐射敏感元件，将可固化元件放置在微电子器件中和/或其上，以及在微电子器件中和/或上在微电子器件上形成屏障至少部分地 抑制辐射敏感成分的辐射。 辐射敏感组件可以是掺杂硅，硫族化物，聚合物随机存取存储器或当用一个或多个特定的辐射频率照射时被改变的任何其它组分。 可固化组分可以是粘合剂，底部填充层，密封剂，隔离物或由需要通过照射固化的材料构成的任何其它特征。
-
7.发明授权公开(公告)号：US08896105B2
公开(公告)日：2014-11-25
申请号：US14056669
申请日：2013-10-17
Applicant: Micron Technology, Inc.
Inventor： Warren M. Farnworth , Kristy A. Campbell
IPC: H01L23/552 , H01L31/02 , H01L23/00
CPC classification number: H01L31/02 , H01L23/552 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83101 , H01L2224/83855 , H01L2224/83865 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00015 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method includes constructing a radiation sensitive component in and/or on a microelectronic device, placing a curable component in and/or on the microelectronic device, and forming a barrier in and/or on the microelectronic device to at least partially inhibit irradiation of the radiation sensitive component. The radiation sensitive component can be doped silicon, chalcogenide, polymeric random access memory, or any other component that is altered when irradiated with one or more specific frequencies of radiation. The curable component can be an adhesive, an underfill layer, an encapsulant, a stand-off, or any other feature constructed of a material that requires curing by irradiation.
Abstract translation: 本文公开了用于制造微电子器件的微电子器件和方法。 在一个实施例中，一种方法包括在微电子器件内和/或微电子器件上构建辐射敏感元件，将可固化元件放置在微电子器件中和/或其上，以及在微电子器件中和/或上在微电子器件上形成屏障至少部分地 抑制辐射敏感成分的辐射。 辐射敏感组件可以是掺杂硅，硫族化物，聚合物随机存取存储器或当用一个或多个特定的辐射频率照射时被改变的任何其它组分。 可固化组分可以是粘合剂，底部填充层，密封剂，隔离物或由需要通过照射固化的材料构成的任何其它特征。
-
公开(公告)号：US20170207274A1
公开(公告)日：2017-07-20
申请号：US15478072
申请日：2017-04-03
Applicant: Micron Technology, Inc.
Inventor： Kristy A. Campbell
CPC classification number: H01L27/285 , B82Y10/00 , G11C13/0011 , G11C13/0014 , G11C13/0016 , G11C2213/72 , H01L27/2409 , H01L27/28 , H01L27/286 , H01L29/8615 , H01L45/1608 , H01L45/1683 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0078 , H01L51/0591 , H01L51/102
Abstract: A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.
-
9.发明申请公开(公告)号：US20160079531A1
公开(公告)日：2016-03-17
申请号：US14948893
申请日：2015-11-23
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jun Liu , Kristy A. Campbell
IPC: H01L45/00
CPC classification number: H01L45/1675 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/1273 , H01L45/143 , H01L45/16 , H01L45/1616 , H01L45/1625 , Y10S977/773
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.
-
公开(公告)号：US09224948B2
公开(公告)日：2015-12-29
申请号：US14524435
申请日：2014-10-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jun Liu , Kristy A. Campbell
IPC: H01L45/00
CPC classification number: H01L45/1675 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/1273 , H01L45/143 , H01L45/16 , H01L45/1616 , H01L45/1625 , Y10S977/773
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.012 seconds)
