公开(公告)号：US20150170979A1

公开(公告)日：2015-06-18

申请号：US14106190

申请日：2013-12-13

Applicant: Micron Technology, Inc.

Inventor： Charles H. Dennison ,  Kenneth W. Marr ,  Deepak Thimmegowda ,  Philip J. Ireland

IPC: H01L21/66

CPC classification number: G01R31/2896 ,  H01L22/14 ,  H01L22/34 ,  H01L23/48 ,  H01L23/481 ,  H01L23/485 ,  H01L29/7823 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Apparatuses and methods can include a die seal between an integrated circuit region of a die and a periphery of the die. A via chain(s) may be arranged around an inner circumference of the die seal between the die seal and the integrated circuit region and/or around an outer circumference of the die seal between the die seal and the periphery of the die. The via chain may include a plurality of contacts comprised of conductive material and extending through portions of the die. Circuitry may be coupled to an end of the via chain to detect an electrical signal. Additional apparatuses and methods are described.

Abstract translation: 设备和方法可以包括在管芯的集成电路区域和管芯周边之间的管芯密封。 通孔链可围绕模具密封件和集成电路区域之间的模具密封件的内圆周和/或围绕模具密封件和模具周边之间的模具密封件的外圆周布置。 通孔链可以包括多个由导电材料组成并且延伸穿过模具的部分的触点。 电路可以耦合到通孔链的端部以检测电信号。 描述附加的装置和方法。

公开(公告)号：US10121738B2

公开(公告)日：2018-11-06

申请号：US15407205

申请日：2017-01-16

Applicant: Micron Technology, Inc.

Inventor： Alan G. Wood ,  Philip J. Ireland

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768

Abstract: Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.

公开(公告)号：US09287184B2

公开(公告)日：2016-03-15

申请号：US14106190

申请日：2013-12-13

Applicant: Micron Technology, Inc.

Inventor： Charles H. Dennison ,  Kenneth W. Marr ,  Deepak Thimmegowda ,  Philip J. Ireland

IPC: H01L21/66 ,  H01L23/48 ,  H01L23/485 ,  H01L29/78

CPC classification number: G01R31/2896 ,  H01L22/14 ,  H01L22/34 ,  H01L23/48 ,  H01L23/481 ,  H01L23/485 ,  H01L29/7823 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Apparatuses and methods can include a die seal between an integrated circuit region of a die and a periphery of the die. A via chain(s) may be arranged around an inner circumference of the die seal between the die seal and the integrated circuit region and/or around an outer circumference of the die seal between the die seal and the periphery of the die. The via chain may include a plurality of contacts comprised of conductive material and extending through portions of the die. Circuitry may be coupled to an end of the via chain to detect an electrical signal. Additional apparatuses and methods are described.

Abstract translation: 设备和方法可以包括在管芯的集成电路区域和管芯周边之间的管芯密封。 通孔链可围绕模具密封件和集成电路区域之间的模具密封件的内圆周和/或围绕模具密封件和模具周边之间的模具密封件的外圆周布置。 通孔链可以包括多个由导电材料组成并且延伸穿过模具的部分的触点。 电路可以耦合到通孔链的端部以检测电信号。 描述附加的装置和方法。

公开(公告)号：US20140287584A1

公开(公告)日：2014-09-25

申请号：US14144806

申请日：2013-12-31

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Kyle K. Kirby ,  Kunal R. Parekh ,  Philip J. Ireland ,  Sarah A. Niroumand

IPC: H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/02063 ,  H01L21/76843 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L2224/13025 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

Abstract: Microelectronic devices with through-silicon vias and associated methods of manufacturing such devices. One embodiment of a method for forming tungsten through-silicon vias comprising forming an opening having a sidewall such that the opening extends through at least a portion of a substrate on which microelectronic structures have been formed. The method can further include lining the sidewall with a dielectric material, depositing tungsten on the dielectric material such that a cavity extends through at least a portion of the tungsten, and filling the cavity with a polysilicon material.

Abstract translation: 具有通硅通孔的微电子器件及其相关制造方法。 一种用于形成钨硅通孔的方法的一个实施例，包括形成具有侧壁的开口，使得所述开口延伸穿过已经形成有微电子结构的衬底的至少一部分。 该方法可以进一步包括用介电材料衬里侧壁，在介电材料上沉积钨，使得空腔延伸穿过钨的至少一部分，并用多晶硅材料填充空腔。

公开(公告)号：US20160195581A1

公开(公告)日：2016-07-07

申请号：US15069316

申请日：2016-03-14

Applicant: Micron Technology, Inc.

Inventor： Charles H. Dennison ,  Kenneth W. Marr ,  Deepak Thimmegowda ,  Philip J. Ireland

IPC: G01R31/28

CPC classification number: G01R31/2896 ,  H01L22/14 ,  H01L22/34 ,  H01L23/48 ,  H01L23/481 ,  H01L23/485 ,  H01L29/7823 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Apparatuses and methods can include a die seal between an integrated circuit region of a die and a periphery of the die. A via chain(s) may be arranged around an inner circumference of the die seal between the die seal and the integrated circuit region and/or around an outer circumference of the die seal between the die seal and the periphery of the die. The via chain may include a plurality of contacts comprised of conductive material and extending through portions of the die. Circuitry may be coupled to an end of the via chain to detect an electrical signal. Additional apparatuses and methods are described.

公开(公告)号：US10978386B2

公开(公告)日：2021-04-13

申请号：US15133121

申请日：2016-04-19

Applicant: Micron Technology, Inc.

Inventor： Kyle K. Kirby ,  Kunal R. Parekh ,  Philip J. Ireland ,  Sarah A. Niroumand

IPC: H01L23/522 ,  H01L23/48 ,  H01L23/528 ,  H01L23/532 ,  H01L21/02 ,  H01L21/768

Abstract: Microelectronic devices with through-silicon vias and associated methods of manufacturing such devices. One embodiment of a method for forming tungsten through-silicon vias comprising forming an opening having a sidewall such that the opening extends through at least a portion of a substrate on which microelectronic structures have been formed. The method can further include lining the sidewall with a dielectric material, depositing tungsten on the dielectric material such that a cavity extends through at least a portion of the tungsten, and filling the cavity with a polysilicon material.

公开(公告)号：US20170125342A1

公开(公告)日：2017-05-04

申请号：US15407205

申请日：2017-01-16

Applicant: Micron Technology, Inc.

Inventor： Alan G. Wood ,  Philip J. Ireland

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03444 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03845 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05083 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/04941

Abstract: Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.

公开(公告)号：US09583419B2

公开(公告)日：2017-02-28

申请号：US14505925

申请日：2014-10-03

Applicant: Micron Technology, Inc.

Inventor： Alan G. Wood ,  Philip J. Ireland

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03444 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03845 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05083 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/04941

Abstract: Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.

Abstract translation: 一些实施例包括通过半导体衬底形成互连的方法。 可以形成开口以在半导体衬底的中途延伸，并且可以在开口内形成一部分互连。 另一个开口可以形成为从基板的第二侧延伸到互连的第一部分，并且互连的另一部分可以形成在该开口内。 一些实施例包括半导体结构，其具有从衬底的第一侧部分延伸穿过半导体衬底的穿透衬底互连件的第一部分; 并且具有从所述衬底的第二侧延伸的所述贯通衬底互连件的第二部分，并且具有全部延伸到所述互连件的第一部分的多个分离的导电指状物。

公开(公告)号：US20160233160A1

公开(公告)日：2016-08-11

申请号：US15133121

申请日：2016-04-19

Applicant: Micron Technology, Inc.

Inventor： Kyle K. Kirby ,  Kunal R. Parekh ,  Philip J. Ireland ,  Sarah A. Niroumand

IPC: H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/02063 ,  H01L21/76843 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L2224/13025 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

Abstract: Microelectronic devices with through-silicon vias and associated methods of manufacturing such devices. One embodiment of a method for forming tungsten through-silicon vias comprising forming an opening having a sidewall such that the opening extends through at least a portion of a substrate on which microelectronic structures have been formed. The method can further include lining the sidewall with a dielectric material, depositing tungsten on the dielectric material such that a cavity extends through at least a portion of the tungsten, and filling the cavity with a polysilicon material.

Abstract translation: 具有通硅通孔的微电子器件及其相关制造方法。 一种用于形成钨硅通孔的方法的一个实施例，包括形成具有侧壁的开口，使得所述开口延伸穿过已经形成有微电子结构的衬底的至少一部分。 该方法可以进一步包括用介电材料衬里侧壁，在介电材料上沉积钨，使得空腔延伸穿过钨的至少一部分，并用多晶硅材料填充空腔。

公开(公告)号：US20150130029A1

公开(公告)日：2015-05-14

申请号：US14505925

申请日：2014-10-03

Applicant: Micron Technology, Inc.

Inventor： Alan G. Wood ,  Philip J. Ireland

IPC: H01L23/48

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03444 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03845 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05083 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/04941

Abstract: Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.

Abstract translation: 一些实施例包括通过半导体衬底形成互连的方法。 可以形成开口以在半导体衬底的中途延伸，并且可以在开口内形成一部分互连。 另一个开口可以形成为从基板的第二侧延伸到互连的第一部分，并且互连的另一部分可以形成在该开口内。 一些实施例包括半导体结构，其具有从衬底的第一侧部分延伸穿过半导体衬底的穿透衬底互连件的第一部分; 并且具有从所述衬底的第二侧延伸的所述贯通衬底互连件的第二部分，并且具有全部延伸到所述互连件的第一部分的多个分离的导电指状物。