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公开(公告)号:US20070045727A1
公开(公告)日:2007-03-01
申请号:US11508860
申请日:2006-08-24
IPC分类号: H01L29/76
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/0696 , H01L29/086 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/42368 , H01L29/42372 , H01L29/4916 , H01L29/4933 , H01L29/518 , H01L29/66712 , H01L29/7806
摘要: A technology capable of realizing a MOSFET with low ON-resistance and low feedback capacitance, in which the punch through of a channel layer can be prevented even when the shallow junction of the channel layer is formed in a planar type MOSFET is provided. A P type polysilicon is used for a gate electrode in a planar type MOSFET, in particular, in an N channel DMOSFET.
摘要翻译: 提供了能够实现具有低导通电阻和低反馈电容的MOSFET的技术,其中即使在沟道层的浅结形成在平面型MOSFET中时也可以防止沟道层的穿通。 P型多晶硅用于平面型MOSFET中的栅电极,特别是在N沟道DMOSFET中。
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公开(公告)号:US20090179235A1
公开(公告)日:2009-07-16
申请号:US12405945
申请日:2009-03-17
IPC分类号: H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号: H01L29/7813 , H01L21/823487 , H01L24/48 , H01L24/49 , H01L25/16 , H01L27/088 , H01L2224/05554 , H01L2224/0603 , H01L2224/4813 , H01L2224/48137 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A semiconductor device in which the self-turn-on phenomenon is prevented that can significantly improve power conversion efficiency. The semiconductor device is a system-in-package for power supply applications in which a high-side switch, a low-side switch, and two drivers are included in a single package. The device includes an auxiliary switch disposed between the gate and source of said low-side switch, and a low-side MOSFET 3 for the low-side switch and an auxiliary MOSFET 4 for the auxiliary switch are disposed on the same chip. In this way, the self-turn-on phenomenon can be prevented, allowing the mounting of a low-side MOSFET 3 with a low threshold voltage and thereby significantly improving power conversion efficiency. The gate of the auxiliary MOSFET 4 is driven by the driver for the high-side MOSFET 2, thereby eliminating the need for a new drive circuit and realizing the same pin configuration as existing products, which facilitates easy replacement.
摘要翻译: 能够防止能够显着提高电力转换效率的自启动现象的半导体装置。 半导体器件是用于电源应用的系统级封装,其中高侧开关,低侧开关和两个驱动器包括在单个封装中。 该装置包括设置在所述低侧开关的栅极和源极之间的辅助开关,并且用于低侧开关的低侧MOSFET 3和用于辅助开关的辅助MOSFET 4设置在同一芯片上。 以这种方式,可以防止自导通现象,允许安装具有低阈值电压的低端MOSFET 3,从而显着提高功率转换效率。 辅助MOSFET 4的栅极由用于高侧MOSFET 2的驱动器驱动,从而不需要新的驱动电路并实现与现有产品相同的引脚配置,这便于更换。
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公开(公告)号:US20060006432A1
公开(公告)日:2006-01-12
申请号:US11175288
申请日:2005-07-07
IPC分类号: H01L29/76
CPC分类号: H01L29/7813 , H01L21/823487 , H01L24/48 , H01L24/49 , H01L25/16 , H01L27/088 , H01L2224/05554 , H01L2224/0603 , H01L2224/4813 , H01L2224/48137 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A semiconductor device in which the self-turn-on phenomenon is prevented that can significantly improve power conversion efficiency. The semiconductor device is a system-in-package for power supply applications in which a high-side switch, a low-side switch, and two drivers are included in a single package. The device includes an auxiliary switch disposed between the gate and source of said low-side switch, and a low-side MOSFET 3 for the low-side switch and an auxiliary MOSFET 4 for the auxiliary switch are disposed on the same chip. In this way, the self-turn-on phenomenon can be prevented, allowing the mounting of a low-side MOSFET 3 with a low threshold voltage and thereby significantly improving power conversion efficiency. The gate of the auxiliary MOSFET 4 is driven by the driver for the high-side MOSFET 2, thereby eliminating the need for a new drive circuit and realizing the same pin configuration as existing products, which facilitates easy replacement.
摘要翻译: 能够防止能够显着提高电力转换效率的自启动现象的半导体装置。 半导体器件是用于电源应用的系统级封装,其中高侧开关,低侧开关和两个驱动器包括在单个封装中。 该装置包括设置在所述低侧开关的栅极和源极之间的辅助开关,并且用于低侧开关的低侧MOSFET 3和用于辅助开关的辅助MOSFET 4设置在同一芯片上。 以这种方式,可以防止自导通现象,允许安装具有低阈值电压的低端MOSFET 3,从而显着提高功率转换效率。 辅助MOSFET 4的栅极由用于高侧MOSFET 2的驱动器驱动,从而不需要新的驱动电路并实现与现有产品相同的引脚配置,这便于更换。
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公开(公告)号:US07514731B2
公开(公告)日:2009-04-07
申请号:US11175288
申请日:2005-07-07
IPC分类号: H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号: H01L29/7813 , H01L21/823487 , H01L24/48 , H01L24/49 , H01L25/16 , H01L27/088 , H01L2224/05554 , H01L2224/0603 , H01L2224/4813 , H01L2224/48137 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A semiconductor device in which the self-turn-on phenomenon is prevented that can significantly improve power conversion efficiency. The semiconductor device is a system-in-package for power supply applications in which a high-side switch, a low-side switch, and two drivers are included in a single package. The device includes an auxiliary switch disposed between the gate and source of said low-side switch, and a low-side MOSFET 3 for the low-side switch and an auxiliary MOSFET 4 for the auxiliary switch are disposed on the same chip. In this way, the self-turn-on phenomenon can be prevented, allowing the mounting of a low-side MOSFET 3 with a low threshold voltage and thereby significantly improving power conversion efficiency. The gate of the auxiliary MOSFET 4 is driven by the driver for the high-side MOSFET 2, thereby eliminating the need for a new drive circuit and realizing the same pin configuration as existing products, which facilitates easy replacement.
摘要翻译: 能够防止能够显着提高电力转换效率的自启动现象的半导体装置。 半导体器件是用于电源应用的系统级封装,其中高侧开关,低侧开关和两个驱动器包括在单个封装中。 该装置包括设置在所述低侧开关的栅极和源极之间的辅助开关,并且用于低侧开关的低侧MOSFET 3和用于辅助开关的辅助MOSFET 4设置在同一芯片上。 以这种方式,可以防止自导通现象,允许安装具有低阈值电压的低端MOSFET 3,从而显着提高功率转换效率。 辅助MOSFET 4的栅极由用于高侧MOSFET 2的驱动器驱动,从而不需要新的驱动电路并实现与现有产品相同的引脚配置,这便于更换。
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公开(公告)号:US07005834B2
公开(公告)日:2006-02-28
申请号:US10882672
申请日:2004-07-02
CPC分类号: H02M3/1588 , Y02B70/1466
摘要: In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.
摘要翻译: 在同步整流型的电源中,不增加驱动损耗来抑制MOSFET的自转导通现象,从而提高功率效率。 在同步整流电路中,使换向MOSFET的阈值高于整流MOSFET的阈值,特别是使换向MOSFET 3的阈值比整流MOSFET2的阈值高0.5V以上。 整流用MOSFET2的阈值低于1.5V,换流用MOSFET3的阈值高于2.0V。
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公开(公告)号:US20050007078A1
公开(公告)日:2005-01-13
申请号:US10882672
申请日:2004-07-02
CPC分类号: H02M3/1588 , Y02B70/1466
摘要: In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.
摘要翻译: 在同步整流型的电源中,不增加驱动损耗来抑制MOSFET的自转导通现象,从而提高功率效率。 在同步整流电路中,使换向MOSFET的阈值高于整流MOSFET的阈值,特别是使换向MOSFET 3的阈值比整流MOSFET2的阈值高0.5V以上。阈值 的整流用MOSFET2的电压低于1.5V,换流用MOSFET3的阈值高于2.0V。
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公开(公告)号:US08207558B2
公开(公告)日:2012-06-26
申请号:US12405945
申请日:2009-03-17
IPC分类号: H01L29/76 , H01L31/062 , H01L31/113
CPC分类号: H01L29/7813 , H01L21/823487 , H01L24/48 , H01L24/49 , H01L25/16 , H01L27/088 , H01L2224/05554 , H01L2224/0603 , H01L2224/4813 , H01L2224/48137 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A semiconductor device in which the self-turn-on phenomenon is prevented that can significantly improve power conversion efficiency. The semiconductor device is a system-in-package for power supply applications in which a high-side switch, a low-side switch, and two drivers are included in a single package. The device includes an auxiliary switch disposed between the gate and source of said low-side switch, and a low-side MOSFET 3 for the low-side switch and an auxiliary MOSFET 4 for the auxiliary switch are disposed on the same chip. In this way, the self-turn-on phenomenon can be prevented, allowing the mounting of a low-side MOSFET 3 with a low threshold voltage and thereby significantly improving power conversion efficiency. The gate of the auxiliary MOSFET 4 is driven by the driver for the high-side MOSFET 2, thereby eliminating the need for a new drive circuit and realizing the same pin configuration as existing products, which facilitates easy replacement.
摘要翻译: 能够防止能够显着提高电力转换效率的自启动现象的半导体装置。 半导体器件是用于电源应用的系统级封装,其中高侧开关,低侧开关和两个驱动器被包括在单个封装中。 该装置包括设置在所述低侧开关的栅极和源极之间的辅助开关,并且用于低侧开关的低侧MOSFET 3和用于辅助开关的辅助MOSFET 4设置在同一芯片上。 以这种方式,可以防止自导通现象,允许安装具有低阈值电压的低端MOSFET 3,从而显着提高功率转换效率。 辅助MOSFET 4的栅极由用于高侧MOSFET 2的驱动器驱动,从而不需要新的驱动电路并实现与现有产品相同的引脚配置,这便于更换。
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公开(公告)号:US07109577B2
公开(公告)日:2006-09-19
申请号:US10836277
申请日:2004-05-03
IPC分类号: H03K19/01
CPC分类号: H01L23/49575 , H01L23/495 , H01L23/4952 , H01L23/49524 , H01L23/49562 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/0401 , H01L2224/05624 , H01L2224/0603 , H01L2224/16 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/40247 , H01L2224/45014 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48624 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49112 , H01L2224/49175 , H01L2224/84801 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M7/003 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00015
摘要: A power MOS-FET is used as a high side switch transistor for a non-insulated DC/DC converter. An electrode section that serves as a source terminal of the power MOS-FET is connected to one outer lead and two outer leads via bonding wires respectively. The outer lead is an external terminal connected to a path for driving the gate. Each of the outer leads is an external terminal connected to a main current path. Owing to the connection of the main current path and the gate driving path in discrete form, the influence of parasitic inductance can be reduced and voltage conversion efficiency can be improved.
摘要翻译: 功率MOS-FET用作非绝缘DC / DC转换器的高侧开关晶体管。 用作功率MOS-FET的源极端子的电极部分分别通过接合线连接到一个外部引线和两个外部引线。 外部引线是连接到用于驱动门的路径的外部端子。 每个外部引线是连接到主电流路径的外部端子。 由于主电流路径和栅极驱动路径以离散的形式连接,所以可以降低寄生电感的影响,并且可以提高电压转换效率。
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公开(公告)号:US20110024802A1
公开(公告)日:2011-02-03
申请号:US12901929
申请日:2010-10-11
IPC分类号: H01L29/812 , H01L29/772
CPC分类号: H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要: To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.
摘要翻译: 为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小,根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域,所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域,所述第三半导体区域具有与所述第二半导体区域相同的导电类型,并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属,所述第三半导体区域具有用于与所述金属接触的金属接触区域,所述金属电连接到所述第二半导体区域,以及相邻的第一导体之间的中心到中心距离 在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。
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公开(公告)号:US20050035400A1
公开(公告)日:2005-02-17
申请号:US10948305
申请日:2004-09-24
IPC分类号: H01L29/872 , H01L21/8234 , H01L27/04 , H01L27/088 , H01L27/095 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/40 , H01L29/45 , H01L29/47 , H01L29/78 , H01L31/0336 , H01L31/062
CPC分类号: H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要: To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.
摘要翻译: 为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小,根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域,所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域,所述第三半导体区域具有与所述第二半导体区域相同的导电类型,并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属,所述第三半导体区域具有用于与所述金属接触的金属接触区域,所述金属电连接到所述第二半导体区域,以及相邻的第一导体之间的中心到中心距离 在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。
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