Semiconductor devices, DC/DC converter and power supply
    3.
    发明申请
    Semiconductor devices, DC/DC converter and power supply 有权
    半导体器件,DC / DC转换器和电源

    公开(公告)号:US20060006432A1

    公开(公告)日:2006-01-12

    申请号:US11175288

    申请日:2005-07-07

    IPC分类号: H01L29/76

    摘要: A semiconductor device in which the self-turn-on phenomenon is prevented that can significantly improve power conversion efficiency. The semiconductor device is a system-in-package for power supply applications in which a high-side switch, a low-side switch, and two drivers are included in a single package. The device includes an auxiliary switch disposed between the gate and source of said low-side switch, and a low-side MOSFET 3 for the low-side switch and an auxiliary MOSFET 4 for the auxiliary switch are disposed on the same chip. In this way, the self-turn-on phenomenon can be prevented, allowing the mounting of a low-side MOSFET 3 with a low threshold voltage and thereby significantly improving power conversion efficiency. The gate of the auxiliary MOSFET 4 is driven by the driver for the high-side MOSFET 2, thereby eliminating the need for a new drive circuit and realizing the same pin configuration as existing products, which facilitates easy replacement.

    摘要翻译: 能够防止能够显着提高电力转换效率的自启动现象的半导体装置。 半导体器件是用于电源应用的系统级封装,其中高侧开关,低侧开关和两个驱动器包括在单个封装中。 该装置包括设置在所述低侧开关的栅极和源极之间的辅助开关,并且用于低侧开关的低侧MOSFET 3和用于辅助开关的辅助MOSFET 4设置在同一芯片上。 以这种方式,可以防止自导通现象,允许安装具有低阈值电压的低端MOSFET 3,从而显着提高功率转换效率。 辅助MOSFET 4的栅极由用于高侧MOSFET 2的驱动器驱动,从而不需要新的驱动电路并实现与现有产品相同的引脚配置,这便于更换。

    Synchronous rectifier circuit and power supply
    5.
    发明授权
    Synchronous rectifier circuit and power supply 有权
    同步整流电路和电源

    公开(公告)号:US07005834B2

    公开(公告)日:2006-02-28

    申请号:US10882672

    申请日:2004-07-02

    IPC分类号: G05F1/613 G05F1/656

    CPC分类号: H02M3/1588 Y02B70/1466

    摘要: In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.

    摘要翻译: 在同步整流型的电源中,不增加驱动损耗来抑制MOSFET的自转导通现象,从而提高功率效率。 在同步整流电路中,使换向MOSFET的阈值高于整流MOSFET的阈值,特别是使换向MOSFET 3的阈值比整流MOSFET2的阈值高0.5V以上。 整流用MOSFET2的阈值低于1.5V,换流用MOSFET3的阈值高于2.0V。

    Synchronous rectifier circuit and power supply
    6.
    发明申请
    Synchronous rectifier circuit and power supply 有权
    同步整流电路和电源

    公开(公告)号:US20050007078A1

    公开(公告)日:2005-01-13

    申请号:US10882672

    申请日:2004-07-02

    CPC分类号: H02M3/1588 Y02B70/1466

    摘要: In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.

    摘要翻译: 在同步整流型的电源中,不增加驱动损耗来抑制MOSFET的自转导通现象,从而提高功率效率。 在同步整流电路中,使换向MOSFET的阈值高于整流MOSFET的阈值,特别是使换向MOSFET 3的阈值比整流MOSFET2的阈值高0.5V以上。阈值 的整流用MOSFET2的电压低于1.5V,换流用MOSFET3的阈值高于2.0V。

    Semiconductor device, DC/DC converter and power supply
    7.
    发明授权
    Semiconductor device, DC/DC converter and power supply 有权
    半导体器件,DC / DC转换器和电源

    公开(公告)号:US08207558B2

    公开(公告)日:2012-06-26

    申请号:US12405945

    申请日:2009-03-17

    摘要: A semiconductor device in which the self-turn-on phenomenon is prevented that can significantly improve power conversion efficiency. The semiconductor device is a system-in-package for power supply applications in which a high-side switch, a low-side switch, and two drivers are included in a single package. The device includes an auxiliary switch disposed between the gate and source of said low-side switch, and a low-side MOSFET 3 for the low-side switch and an auxiliary MOSFET 4 for the auxiliary switch are disposed on the same chip. In this way, the self-turn-on phenomenon can be prevented, allowing the mounting of a low-side MOSFET 3 with a low threshold voltage and thereby significantly improving power conversion efficiency. The gate of the auxiliary MOSFET 4 is driven by the driver for the high-side MOSFET 2, thereby eliminating the need for a new drive circuit and realizing the same pin configuration as existing products, which facilitates easy replacement.

    摘要翻译: 能够防止能够显着提高电力转换效率的自启动现象的半导体装置。 半导体器件是用于电源应用的系统级封装,其中高侧开关,低侧开关和两个驱动器被包括在单个封装中。 该装置包括设置在所述低侧开关的栅极和源极之间的辅助开关,并且用于低侧开关的低侧MOSFET 3和用于辅助开关的辅助MOSFET 4设置在同一芯片上。 以这种方式,可以防止自导通现象,允许安装具有低阈值电压的低端MOSFET 3,从而显着提高功率转换效率。 辅助MOSFET 4的栅极由用于高侧MOSFET 2的驱动器驱动,从而不需要新的驱动电路并实现与现有产品相同的引脚配置,这便于更换。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20110024802A1

    公开(公告)日:2011-02-03

    申请号:US12901929

    申请日:2010-10-11

    IPC分类号: H01L29/812 H01L29/772

    摘要: To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.

    摘要翻译: 为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小,根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域,所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域,所述第三半导体区域具有与所述第二半导体区域相同的导电类型,并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属,所述第三半导体区域具有用于与所述金属接触的金属接触区域,所述金属电连接到所述第二半导体区域,以及相邻的第一导体之间的中心到中心距离 在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。

    Semiconductor device
    10.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US20050035400A1

    公开(公告)日:2005-02-17

    申请号:US10948305

    申请日:2004-09-24

    摘要: To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.

    摘要翻译: 为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小,根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域,所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域,所述第三半导体区域具有与所述第二半导体区域相同的导电类型,并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属,所述第三半导体区域具有用于与所述金属接触的金属接触区域,所述金属电连接到所述第二半导体区域,以及相邻的第一导体之间的中心到中心距离 在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。