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19 条记录 (耗时 0.029 秒)

    Heater for membrane mask in an electron-beam lithography system
    1.
    发明授权
    Heater for membrane mask in an electron-beam lithography system 失效
    电子束光刻系统中的膜掩模加热器

    公开(公告)号：US5742065A

    公开(公告)日：1998-04-21

    申请号：US787069

    申请日：1997-01-22

    申请人： Michael Stuart Gordon ,  Rodney Arthur Kendall ,  David John Pinckney ,  James Louis Speidell

    发明人： Michael Stuart Gordon ,  Rodney Arthur Kendall ,  David John Pinckney ,  James Louis Speidell

    IPC分类号： G21K5/04 ,  G03F1/20 ,  G03F1/22 ,  H01J37/09 ,  H01L21/027 ,  H01J31/08

    CPC分类号： G03F1/20 ,  G03F1/22 ,  H01J37/09 ,  H01J2237/022 ,  H01J2237/0453 ,  H01J2237/3175

    摘要： A method for reducing contamination in a silicon membrane mask in a lithography system is described. The method includes: doping the top surface of the silicon membrane mask with boron to lower the electrical resistance of the mask; subsequently metalizing the surface of the mask to further lower its electrical resistance; and, finally, applying a voltage between opposite surfaces of the mask, the voltage generating an electric field that passes through the membrane mask, heating the membrane mask. The method further includes: calculating distortions in the shape of each of the patterns within the mask caused by heating the membrane mask; compensating for the proximity of other shapes positioned in the vicinity of each of the patterns; and appropriately modifying the shape of each of the patterns. The above described method can be equally applied to an e-beam system or to an ion-beam lithography system, and both, to stencil masks and to scattering masks.

    摘要翻译： 描述了一种在光刻系统中减少硅膜掩模中污染的方法。 该方法包括：用硼掺杂硅膜掩模的顶表面以降低掩模的电阻; 随后金属化掩模的表面以进一步降低其电阻; 并且最后，在掩模的相对表面之间施加电压，产生通过膜掩模的电场的电压，加热膜掩模。 该方法还包括：通过加热膜掩模来计算掩模内的每个图案的形状的变形; 补偿位于每个图案附近的其它形状的接近; 并适当地修改每个图案的形状。 上述方法可以同样地应用于电子束系统或离子束光刻系统，并且可以应用于模板掩模和散射掩模。

    Method and apparatus for thermal management of integrated circuits
    4.
    发明授权
    Method and apparatus for thermal management of integrated circuits 失效
    集成电路热管理方法和装置

    公开(公告)号：US06893902B2

    公开(公告)日：2005-05-17

    申请号：US10122613

    申请日：2002-04-11

    申请人： Michael James Cordes ,  Steven Alan Cordes ,  Uttam Shyamalindu Ghoshal ,  Errol Wayne Robinson ,  James Louis Speidell

    发明人： Michael James Cordes ,  Steven Alan Cordes ,  Uttam Shyamalindu Ghoshal ,  Errol Wayne Robinson ,  James Louis Speidell

    IPC分类号： H01L23/38 ,  H01L35/28 ,  H01L35/32 ,  H01L35/34 ,  H01L21/44 ,  H01L23/34 ,  H01L35/04

    CPC分类号： H01L23/38 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process. Using this method, semiconductor devices including an integrated circuit and integrated modules of thermoelectric elements are formed having cooling capacities corresponding to heat dissipated from different portions of the integrated circuit. As a result, substantially uniform temperature distribution across the integrated circuit can be achieved.

    摘要翻译： 集成电路的热管理方法和装置。 半导体器件包括形成在公共衬底上的集成电路和集成热电冷却器。 通过在基板的前侧形成集成电路并在基板的背面形成集成的热电冷却器来制造半导体器件。 在基板的背面形成能够从集成电路吸收热量的半导体材料的第一散热器。 N型热电元件形成在形成在第一散热器上的触点上。 P型热电元件形成在能够散热的半导体材料的第二散热器上形成的触点上。 分别通过倒装焊接工艺将p型和n型热电元件分别结合到第一和第二散热器上的触点。 使用该方法，形成包括集成电路的半导体器件和热电元件的集成模块，其具有对应于从集成电路的不同部分散热的散热能力。 结果，可以实现整个集成电路的基本均匀的温度分布。

    Low temperature Bi-CMOS compatible process for MEMS RF resonators and filters
    6.
    发明授权
    Low temperature Bi-CMOS compatible process for MEMS RF resonators and filters 失效
    用于MEMS RF谐振器和滤波器的低温Bi-CMOS兼容工艺

    公开(公告)号：US07943412B2

    公开(公告)日：2011-05-17

    申请号：US10316254

    申请日：2002-12-10

    申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

    发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

    IPC分类号： H01L21/00

    CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

    摘要： A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material. The method of removal of the sacrificial material is by an oxygen plasma or an anneal in an oxygen containing ambient. A method of vacuum encapsulation of the MEMS resonator or filter is provided through means of a cavity containing the MEMS device, filled with additional sacrificial material, and sealed. Access vias are created through the membrane sealing the cavity; the sacrificial material is removed as stated previously, and the vias are re-sealed in a vacuum coating process.

    摘要翻译： 一种形成微机电系统（MEMS）谐振器或滤波器的方法，其与在任何模拟，数字或混合信号集成电路（IC）工艺中的集成兼容，或者与这些工艺中的金属互连层的形成同时 ，由于其组成材料，加工步骤和制造温度。 MEMS谐振器或滤波器包含形成MEMS谐振器或滤波器的电极的较低金属电平，其可与IC上的现有金属互连电平中的任何一个或任何一个共享。 它还包括谐振元件，该谐振元件由用于电连接和静电驱动的至少一个金属层和至少一个用于结构目的的电介质层组成。 通过沉积并随后去除由碳基材料构成的牺牲层来产生电极和谐振构件之间的间隙。 去除牺牲材料的方法是通过氧等离子体或在含氧环境中的退火。 MEMS谐振器或滤波器的真空封装方法是通过一个包含MEMS器件的空腔的装置提供的，其中填充有额外的牺牲材料并被密封。 通过隔膜密封腔形成通孔; 如先前所述去除牺牲材料，并且在真空涂覆工艺中重新密封通孔。

    Hybrid molds for molten solder screening process
    8.
    发明授权
    Hybrid molds for molten solder screening process 有权

    公开(公告)号：US06390439B1

    公开(公告)日：2002-05-21

    申请号：US09287370

    申请日：1999-04-07

    申请人： Steven A. Cordes ,  David Hirsch Danovitch ,  Peter Alfred Gruber ,  James Louis Speidell ,  Joseph Peter Zinter

    发明人： Steven A. Cordes ,  David Hirsch Danovitch ,  Peter Alfred Gruber ,  James Louis Speidell ,  Joseph Peter Zinter

    IPC分类号： B29C3300

    CPC分类号： B23K3/0623 ,  B23K3/0638 ,  B23K2101/40 ,  H05K3/3457 ,  Y10T156/10

    摘要： Hybrid molds for molding a multiplicity of solder balls for use in a molten solder screening process and methods for preparing such molds are disclosed. A method for forming the multiplicity of cavities in a pyramidal shape by anisotropically etching a crystalline silicon substrate along a specific crystallographic plane is utilized to form a crystalline silicon face plate used in the present invention hybrid mold. In a preferred embodiment, a silicon face plate is bonded to a borosilicate glass backing plate by adhesive means in a method that ensures coplanarity is achieved between the top surfaces of the silicon face plate and the glass backing plate. In an alternate embodiment, an additional glass frame is used for bonding a silicon face plate to a glass backing plate, again with ensured coplanarity between the top surfaces of the silicon face plate and the glass frame. In a second alternate embodiment, a silicon face plate is encased in an extender material which may be borosilicate glass or a polymer. The encasing is performed on a leveling fixture such that the top surface of the silicon face plate and the top surface of the extender material after solidification are perfectly leveled.

    Hybrid molds for molten solder screening process
    10.
    发明授权
    Hybrid molds for molten solder screening process 失效
    熔融焊料筛选工艺的混合模具

    公开(公告)号：US06832747B2

    公开(公告)日：2004-12-21

    申请号：US10128210

    申请日：2002-04-23

    申请人： Steven A. Cordes ,  David Hirsch Danovitch ,  Peter Alfred Gruber ,  James Louis Speidell ,  Joseph Peter Zinter

    发明人： Steven A. Cordes ,  David Hirsch Danovitch ,  Peter Alfred Gruber ,  James Louis Speidell ,  Joseph Peter Zinter

    IPC分类号： B29C3300

    CPC分类号： B23K3/0623 ,  B23K3/0638 ,  B23K2101/40 ,  H05K3/3457 ,  Y10T156/10

    摘要： Hybrid molds for molding a multiplicity of solder balls for use in a molten solder screening process and methods for preparing such molds are disclosed. A method for forming the multiplicity of cavities in a pyramidal shape by anisotropically etching a crystalline silicon substrate along a specific crystallographic plane is utilized to form a crystalline silicon face plate used in the present invention hybrid mold. In a preferred embodiment, a silicon face plate is bonded to a borosilicate glass backing plate by adhesive means in a method that ensures coplanarity is achieved between the top surfaces of the silicon face plate and the glass backing plate. In an alternate embodiment, an additional glass frame is used for bonding a silicon face plate to a glass backing plate, again with ensured coplanarity between the top surfaces of the silicon face plate and the glass frame. In a second alternate embodiment, a silicon face plate is encased in an extender material which may be borosilicate glass or a polymer. The encasing is performed on a leveling fixture such that the top surface of the silicon face plate and the top surface of the extender material after solidification are perfectly leveled.

    摘要翻译： 公开了用于模制用于熔融焊料筛选过程的多个焊球的混合模具和用于制备这种模具的方法。 利用用于通过沿着特定结晶平面各向异性蚀刻晶体硅衬底而形成金字塔形状的多个空腔的方法来形成本发明混合模具中使用的结晶硅面板。 在一个优选的实施例中，硅面板通过粘合方法以一种确保在硅面板和玻璃背板的顶表面之间实现共面性的方法结合到硼硅酸盐玻璃背板上。 在替代实施例中，另外的玻璃框架用于将硅面板粘合到玻璃背板，再次确保硅面板的顶表面和玻璃框架之间的共面性。 在第二替代实施例中，硅面板封装在可以是硼硅酸盐玻璃或聚合物的增量材料中。 在平整装置上进行包装，使得硅面板的顶表面和固化后的增量材料的顶表面完美平整。