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公开(公告)号：US20110080247A1
公开(公告)日：2011-04-07
申请号：US12895915
申请日：2010-10-01
CPC分类号： H01F17/0013 , H01F41/041 , H01F2017/002 , Y10T29/4902
摘要： An inductor includes a core substrate including minute column-like electrical conductors extending between a front surface and a back surface of the core substrate. Each column-like electrical conductor is insulated from adjacent column-like electrical conductors by being surrounded by an insulating material. Insulation layers are formed on the front surface and the back surface of the core substrate, respectively. At least two connection electrical conductors extend through each of the insulation layers. Each connection electrical conductor is electrically connected to a plurality of the column-like electrical conductors. Wirings are formed on each of the insulation layers to connect said connection electrical conductors to each other electrically. The wirings, the connection electrical conductors and the column-like electrical conductors are connected to form a coil in a three-dimensional manner.
摘要翻译： 电感器包括芯基板，其包括在芯基板的前表面和后表面之间延伸的微小列状电导体。 每个柱状电导体被绝缘材料包围，与相邻的柱状电导体绝缘。 绝缘层分别形成在芯基板的前表面和后表面上。 至少两个连接电导体延伸穿过每个绝缘层。 每个连接电导体电连接到多个柱状电导体。 在每个绝缘层上形成布线，以将所述连接电导体彼此电连接。 连线，连接电导体和列状电导体被连接以形成三维方式的线圈。
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公开(公告)号：US08134444B2
公开(公告)日：2012-03-13
申请号：US12895915
申请日：2010-10-01
CPC分类号： H01F17/0013 , H01F41/041 , H01F2017/002 , Y10T29/4902
摘要： An inductor includes a core substrate including minute column-like electrical conductors extending between a front surface and a back surface of the core substrate. Each column-like electrical conductor is insulated from adjacent column-like electrical conductors by being surrounded by an insulating material. Insulation layers are formed on the front surface and the back surface of the core substrate, respectively. At least two connection electrical conductors extend through each of the insulation layers. Each connection electrical conductor is electrically connected to a plurality of the column-like electrical conductors. Wirings are formed on each of the insulation layers to connect said connection electrical conductors to each other electrically. The wirings, the connection electrical conductors and the column-like electrical conductors are connected to form a coil in a three-dimensional manner.
摘要翻译： 电感器包括芯基板，其包括在芯基板的前表面和后表面之间延伸的微小列状电导体。 每个柱状电导体被绝缘材料包围，与相邻的柱状电导体绝缘。 绝缘层分别形成在芯基板的前表面和后表面上。 至少两个连接电导体延伸穿过每个绝缘层。 每个连接电导体电连接到多个柱状电导体。 在每个绝缘层上形成布线，以将所述连接电导体彼此电连接。 连线，连接电导体和列状电导体被连接以形成三维方式的线圈。
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公开(公告)号：US07793412B2
公开(公告)日：2010-09-14
申请号：US10612222
申请日：2003-07-03
IPC分类号： H05K3/30
CPC分类号： H01L23/5389 , H01L24/24 , H01L24/82 , H01L24/97 , H01L2224/24011 , H01L2224/2402 , H01L2224/24226 , H01L2224/32225 , H01L2224/73267 , H01L2224/76155 , H01L2224/8203 , H01L2224/82102 , H01L2224/92244 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01039 , H01L2924/01056 , H01L2924/01073 , H01L2924/01078 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H05K1/185 , Y10T29/49004 , Y10T29/49117 , Y10T29/49126 , Y10T29/49131 , Y10T29/49146 , Y10T29/49155 , Y10T29/49165 , Y10T29/53061 , Y10T29/53087 , Y10T29/53174 , Y10T29/532 , H01L2224/82 , H01L2924/00
摘要： A component-embedded board fabrication method includes detecting, before the board is covered with a first insulating layer, the actual position of a first electronic component formed on a surface of the board, calculating a displacement between the design position of the first electronic component on the surface of the board and holding the displacement as first displacement data, and correcting, based on the first displacement data, design data to be used for processing the board after the board is covered with the first insulating layer.
摘要翻译： 组件嵌入式板的制造方法包括在板被第一绝缘层覆盖之前，检测形成在板的表面上的第一电子部件的实际位置，计算第一电子部件的设计位置之间的位移， 将所述板的表面保持位移作为第一位移数据，并且基于所述第一位移数据，校正在所述板被所述第一绝缘层覆盖之后用于处理所述板的设计数据。
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4.发明申请Light Source, Method for Controlling Light Source, and Method for Replacing Light Source 审中-公开光源，光源控制方法及更换光源的方法公开(公告)号：US20070237195A1
公开(公告)日：2007-10-11
申请号：US11696817
申请日：2007-04-05
申请人： Kazunari Sekigawa
发明人： Kazunari Sekigawa
CPC分类号： H01S5/0683 , H01S5/042 , H01S5/0617 , H01S5/4025
摘要： In a light source constructed from a plurality of laser diodes, the overall light output of the light source is controlled based on calibration data which is generated for each pair consisting of any one of the plurality of laser diodes and a dedicated control board for controlling the light output of the one laser diode, and which defines a correspondence between the control value for driving the control board and the value of the light output of the laser diode measured when the control board is driven based on the control value, and when replacing a designated one of the laser diodes in the light source, the designated laser diode and its dedicated control board are replaced together with the corresponding calibration data.
摘要翻译： 在由多个激光二极管构成的光源中，基于对于由多个激光二极管中的任何一个组成的每一对生成的校准数据和用于控制该多个激光二极管的专用控制板来控制光源的整体光输出 一个激光二极管的光输出，并且其定义用于驱动控制板的控制值与基于控制值驱动控制板时测量的激光二极管的光输出的值之间的对应关系，并且当更换 指定光源中的激光二极管之一，将指定的激光二极管及其专用控制板与相应的校准数据一起替换。
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公开(公告)号：US5144514A
公开(公告)日：1992-09-01
申请号：US541832
申请日：1990-06-21
IPC分类号： H01L29/80 , H01L21/822 , H01L27/06 , H03K17/082 , H03K17/567
CPC分类号： H03K17/567 , H03K17/0828
摘要： A semiconductor device drive circuit is provided for turning on and off a semiconductor device that comprises a main static induction transistor and a sense static induction transistor. The drive circuit comprisees a first current source having one terminal connected to a power supply and its other terminal connected to said main static induction transistor, a second current source having one terminal connected to the power supply and its other terminal connected to said sense static induction transistor, a third current source having terminal connected to the power supply and its other terminal connected to the first current source, and a fourth current source having one terminal connected to the power supply and its other terminal connected to the second current source. The drive circuit also has comparing and control means for turning the first and second current sources on to apply a bias when the semiconductor device is to be turned on and for turning off the first and second current sources and turning on the third and fourth current sources when a voltage obtained by sensing a current flowing through the sense static induction transistor is higher than a specific voltage.
摘要翻译： 提供半导体器件驱动电路，用于接通和断开包括主静电感应晶体管和感测静态感应晶体管的半导体器件。 该驱动电路包括一个第一电流源，一个端子连接到电源，而另一个端子连接到所述主静电感应晶体管;第二电流源，其一个端子连接到电源，其另一个端子连接到所述感测静电感应 晶体管，具有连接到所述电源的端子的第三电流源，以及连接到所述第一电流源的另一端子的第三电流源，以及连接到所述电源及其另一端子连接到所述第二电流源的一个端子的第四电流源。 驱动电路还具有比较和控制装置，用于在半导体器件要接通时转动第一和第二电流源以施加偏压，并且用于关闭第一和第二电流源并接通第三和第四电流源 当通过感测流过感测静电感应晶体管的电流获得的电压高于特定电压时。
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6.发明申请Wiring forming system and wiring forming method for forming wiring on wiring board 审中-公开用于在布线板上形成布线的布线形成系统和布线形成方法公开(公告)号：US20110106287A1
公开(公告)日：2011-05-05
申请号：US12929169
申请日：2011-01-05
IPC分类号： G06F19/00
CPC分类号： H05K1/0269 , H01L2924/0002 , H05K3/0005 , H05K3/0082 , H05K3/064 , H05K3/125 , H05K2203/013 , H05K2203/107 , H05K2203/162 , H01L2924/00
摘要： A wiring forming system comprises: maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to an wiring board; post-development inspect unit which tests the board after development, by using the exposure data and the image data of the board exposed and developed by the maskless exposure unit; etching unit which etches the developed board; and post-etching inspect unit which tests an etching pattern formed on the etched board, by using etching inspect data generated based on the design data and the image data of the board etched by the etching unit.
摘要翻译： 布线形成系统包括：无掩模曝光单元，其通过使用基于与布线板相关的设计数据生成的曝光数据来直接曝光未曝光的印刷电路板; 开发后检查单元，通过使用曝光数据和由无掩模曝光单元曝光和显影的板的图像数据进行开发后测试板; 蚀刻单元，蚀刻开发板; 以及蚀刻后检查单元，其通过使用基于设计数据生成的蚀刻检查数据和由蚀刻单元蚀刻的板的图像数据来测试形成在蚀刻板上的蚀刻图案。
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公开(公告)号：US07307691B2
公开(公告)日：2007-12-11
申请号：US10974327
申请日：2004-10-27
CPC分类号： G03F7/70283 , G03F7/70291 , H05K3/0002 , H05K3/0005 , H05K3/0082
摘要： A direct exposure system comprises: a data mask that is a data object including drawing data; and a control mask that is a data object including at least one logical layer in which information about exposure conditions applied according to regions on a substrate is specified, and performs a direct exposure process using integrated data generated by combining the data mask with the control mask.
摘要翻译： 直接曝光系统包括：作为包括绘图数据的数据对象的数据掩模; 以及作为包括至少一个逻辑层的控制掩模，所述至少一个逻辑层指定了根据基板上的区域应用的关于曝光条件的信息，并且使用通过将数据掩模与控制掩模组合而生成的积分数据进行直接曝光处理 。
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8.发明授权Exposure apparatus and exposure method for performing high-speed and efficient direct exposure 有权用于进行高速直接曝光的曝光装置和曝光方法公开(公告)号：US07262832B2
公开(公告)日：2007-08-28
申请号：US11259810
申请日：2005-10-26
申请人： Kazunari Sekigawa
发明人： Kazunari Sekigawa
CPC分类号： G03F7/70291 , G03F7/70283 , G03F7/70508
摘要： In an exposure apparatus, in which exposure data necessary for direct exposure is sequentially supplied to an exposure engine having a plurality of exposure devices and, based on the supplied exposure data, the exposure engine forms an exposure pattern on an exposure target substrate which moves relative to the exposure engine, lights respectively produced from the exposure device groups based on the identical exposure data supplied to each of the plurality of exposure device groups, are projected via optics so as to be superimposed one on top of another on the same area on the exposure target substrate.
摘要翻译： 在曝光装置中，其中直接曝光所需的曝光数据被顺序提供给具有多个曝光装置的曝光引擎，并且基于所提供的曝光数据，曝光引擎在曝光目标基板上形成相对于相对移动的曝光图案 对于曝光引擎，基于提供给多个曝光装置组中的每一个的相同的曝光数据，从曝光装置组分别产生的光通过光学元件投影，以便在另一个上叠加在另一个上的相同区域上 曝光目标基板。
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9.发明授权Method for designing a layout of a large scale integrated (LSI) circuit and a recording medium incorporating therein a program for such data processing 失效用于设计大规模集成（LSI）电路的布局的方法和其中并入有用于这种数据处理的程序的记录介质公开(公告)号：US06463569B1
公开(公告)日：2002-10-08
申请号：US09598497
申请日：2000-06-22
申请人： Kazunari Sekigawa
发明人： Kazunari Sekigawa
IPC分类号： G06F1750
CPC分类号： G06F17/5068
摘要： The present invention provides a method of data processing for calculating and storing in a memory to deform a data structure of layout designing data in which cells having geometry information and also having reference information to refer to geometry information of another cell are hierarchically combined with each other.
摘要翻译： 本发明提供一种数据处理方法，用于计算和存储在存储器中以使布局设计数据的数据结构变形，其中具有几何信息的单元以及具有参考信息以引用另一个单元的几何信息彼此分层结合 。
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公开(公告)号：US07890203B2
公开(公告)日：2011-02-15
申请号：US10444974
申请日：2003-05-27
CPC分类号： H05K1/0269 , H01L2924/0002 , H05K3/0005 , H05K3/0082 , H05K3/064 , H05K3/125 , H05K2203/013 , H05K2203/107 , H05K2203/162 , H01L2924/00
摘要： A wiring forming system comprises: maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to an wiring board; post-development inspect unit which tests the board after development, by using the exposure data and the image data of the board exposed and developed by the maskless exposure unit; etching unit which etches the developed board; and post-etching inspect unit which tests an etching pattern formed on the etched board, by using etching inspect data generated based on the design data and the image data of the board etched by the etching unit.
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