Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

    公开(公告)号:US10163826B2

    公开(公告)日:2018-12-25

    申请号:US15787041

    申请日:2017-10-18

    Abstract: Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a system comprises a semiconductor component including an interposer substrate, a microelectronic die over the interposer substrate, and a connection structure composed of a volume of solder material between the interposer substrate and the microelectronic die. The connection structure can include at least one of (a) a single, unitary structure covering approximately all of the back side of the microelectronic die, and (b) a structure electrically isolated from internal active features of the microelectronic die. In some embodiments, the connection structure can be positioned to provide generally consistent stress distribution within the system.

    Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

    公开(公告)号:US10692827B2

    公开(公告)日:2020-06-23

    申请号:US16191358

    申请日:2018-11-14

    Abstract: Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a system comprises a semiconductor component including an interposer substrate, a microelectronic die over the interposer substrate, and a connection structure composed of a volume of solder material between the interposer substrate and the microelectronic die. The connection structure can include at least one of (a) a single, unitary structure covering approximately all of the back side of the microelectronic die, and (b) a structure electrically isolated from internal active features of the microelectronic die. In some embodiments, the connection structure can be positioned to provide generally consistent stress distribution within the system.

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